arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_37e_166_cl4_sync.c

   1 /*
   2  * (C) Copyright 2000-2009
   3  * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9
  10 #if (CONFIG_DDR_HCLK)
  11
  12 const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = {
  13         0x03030301,
  14         0x03030303,
  15         0x01000000,
  16         0x00000101,
  17         0x00000001,
  18         0x01000000,
  19         0x00010001,
  20         0x00000100,
  21         0x00010001,
  22         0x00000003,
  23         0x01000201,
  24         0x06000202,
  25         0x06060106,
  26         0x03050502,
  27         0x03040404,
  28         0x02020503,
  29         0x02010106,
  30         0x03000404,
  31         0x02020202,
  32         0x03000203,
  33         0x0707073f,
  34         0x07070707,
  35         0x06060607,
  36         0x06060606,
  37         0x05050506,
  38         0x05050505,
  39         0x04040405,
  40         0x04040404,
  41         0x03030304,
  42         0x03030303,
  43         0x02020203,
  44         0x02020202,
  45         0x01010102,
  46         0x01010101,
  47         0x08080a01,
  48         0x0000023f,
  49         0x00030600,
  50         0x00000000,
  51         0x00000a02,
  52         0x00001c1c,
  53         0x7f000000,
  54         0x005f0000,
  55         0x12030743,
  56         0x00640064,
  57         0x00640064,
  58         0x00640064,
  59         0x00000064,
  60         0x00200020,
  61         0x00200020,
  62         0x00200020,
  63         0x00200020,
  64         0x00200020,
  65         0x00200020,
  66         0x00200020,
  67         0x0000050e,
  68         0x00000000,
  69         0x2d8900c8,
  70         0x00c80014,
  71         0x00000000,
  72         0x00008236,
  73         0x00000000,
  74         0x03030100,
  75         0x03030303,
  76         0x03030303,
  77         0x03030303,
  78         0x00400000,
  79         0x003a0040,
  80         0x00680000,
  81         0x00d80120,
  82         0x003fffff,
  83         0x003fffff,
  84         0x00000000,
  85         0x00000000,
  86         0x003fffff,
  87         0x003fffff,
  88         0x00000000,
  89         0x00000000,
  90         0x003fffff,
  91         0x003fffff,
  92         0x00000000,
  93         0x00000000,
  94         0x003fffff,
  95         0x003fffff,
  96         0x00000000,
  97         0x00000000,
  98         0x003fffff,
  99         0x003fffff,
 100         0x00000000,
 101         0x00000000,
 102         0x003fffff,
 103         0x003fffff,
 104         0x00000000,
 105         0x00000000,
 106         0x003fffff,
 107         0x003fffff,
 108         0x00000000,
 109         0x00000000,
 110         0x00000000,
 111         0x00000000,
 112         0x00000000
 113 };
 114 #endif