arch/arm/cpu/arm926ejs/spear/timer.c

   1 /*
   2  * (C) Copyright 2009
   3  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <asm/io.h>
  26 #include <asm/arch/hardware.h>
  27 #include <asm/arch/spr_gpt.h>
  28 #include <asm/arch/spr_misc.h>
  29
  30 #define GPT_RESOLUTION  (CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
  31 #define READ_TIMER()    (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
  32
  33 static struct gpt_regs *const gpt_regs_p =
  34     (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE;
  35
  36 static struct misc_regs *const misc_regs_p =
  37     (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
  38
  39 DECLARE_GLOBAL_DATA_PTR;
  40
  41 #define timestamp gd->tbl
  42 #define lastdec gd->lastinc
  43
  44 int timer_init(void)
  45 {
  46         u32 synth;
  47
  48         /* Prescaler setting */
  49 #if defined(CONFIG_SPEAR3XX)
  50         writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg);
  51         synth = MISC_GPT4SYNTH;
  52 #elif defined(CONFIG_SPEAR600)
  53         writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
  54         synth = MISC_GPT3SYNTH;
  55 #else
  56 # error Incorrect config. Can only be spear{600|300|310|320}
  57 #endif
  58
  59         writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
  60                &misc_regs_p->periph_clk_cfg);
  61
  62         /* disable timers */
  63         writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control);
  64
  65         /* load value for free running */
  66         writel(GPT_FREE_RUNNING, &gpt_regs_p->compare);
  67
  68         /* auto reload, start timer */
  69         writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
  70
  71         reset_timer_masked();
  72
  73         return 0;
  74 }
  75
  76 /*
  77  * timer without interrupts
  78  */
  79 ulong get_timer(ulong base)
  80 {
  81         return (get_timer_masked() / GPT_RESOLUTION) - base;
  82 }
  83
  84 void __udelay(unsigned long usec)
  85 {
  86         ulong tmo;
  87         ulong start = get_timer_masked();
  88         ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100);
  89         ulong rndoff;
  90
  91         rndoff = (usec % 10) ? 1 : 0;
  92
  93         /* tenudelcnt timer tick gives 10 microsecconds delay */
  94         tmo = ((usec / 10) + rndoff) * tenudelcnt;
  95
  96         while ((ulong) (get_timer_masked() - start) < tmo)
  97                 ;
  98 }
  99
 100 void reset_timer_masked(void)
 101 {
 102         /* reset time */
 103         lastdec = READ_TIMER();
 104         timestamp = 0;
 105 }
 106
 107 ulong get_timer_masked(void)
 108 {
 109         ulong now = READ_TIMER();
 110
 111         if (now >= lastdec) {
 112                 /* normal mode */
 113                 timestamp += now - lastdec;
 114         } else {
 115                 /* we have an overflow ... */
 116                 timestamp += now + GPT_FREE_RUNNING - lastdec;
 117         }
 118         lastdec = now;
 119
 120         return timestamp;
 121 }
 122
 123 void udelay_masked(unsigned long usec)
 124 {
 125         return udelay(usec);
 126 }
 127
 128 /*
 129  * This function is derived from PowerPC code (read timebase as long long).
 130  * On ARM it just returns the timer value.
 131  */
 132 unsigned long long get_ticks(void)
 133 {
 134         return get_timer(0);
 135 }
 136
 137 /*
 138  * This function is derived from PowerPC code (timebase clock frequency).
 139  * On ARM it returns the number of timer ticks per second.
 140  */
 141 ulong get_tbclk(void)
 142 {
 143         return CONFIG_SPEAR_HZ;
 144 }