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1 /*
2 * armboot - Startup Code for ARM926EJS CPU-core
3 *
4 * Copyright (c) 2003 Texas Instruments
5 *
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
7 *
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
14 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34
35 #include <config.h>
36 #include <common.h>
37 #include <version.h>
38
39 #if defined(CONFIG_OMAP1610)
40 #include <./configs/omap1510.h>
41 #elif defined(CONFIG_OMAP730)
42 #include <./configs/omap730.h>
43 #endif
44
45 /*
46 *************************************************************************
47 *
48 * Jump vector table as in table 3.1 in [1]
49 *
50 *************************************************************************
51 */
52
53
54 .globl _start
55 _start:
56 b reset
57 #ifdef CONFIG_PRELOADER
58 /* No exception handlers in preloader */
59 ldr pc, _hang
60 ldr pc, _hang
61 ldr pc, _hang
62 ldr pc, _hang
63 ldr pc, _hang
64 ldr pc, _hang
65 ldr pc, _hang
66
67 _hang:
68 .word do_hang
69 /* pad to 64 byte boundary */
70 .word 0x12345678
71 .word 0x12345678
72 .word 0x12345678
73 .word 0x12345678
74 .word 0x12345678
75 .word 0x12345678
76 .word 0x12345678
77 #else
78 ldr pc, _undefined_instruction
79 ldr pc, _software_interrupt
80 ldr pc, _prefetch_abort
81 ldr pc, _data_abort
82 ldr pc, _not_used
83 ldr pc, _irq
84 ldr pc, _fiq
85
86 _undefined_instruction:
87 .word undefined_instruction
88 _software_interrupt:
89 .word software_interrupt
90 _prefetch_abort:
91 .word prefetch_abort
92 _data_abort:
93 .word data_abort
94 _not_used:
95 .word not_used
96 _irq:
97 .word irq
98 _fiq:
99 .word fiq
100
101 #endif /* CONFIG_PRELOADER */
102 .balignl 16,0xdeadbeef
103
104
105 /*
106 *************************************************************************
107 *
108 * Startup Code (reset vector)
109 *
110 * do important init only if we don't start from memory!
111 * setup Memory and board specific bits prior to relocation.
112 * relocate armboot to ram
113 * setup stack
114 *
115 *************************************************************************
116 */
117
118 .globl _TEXT_BASE
119 _TEXT_BASE:
120 .word CONFIG_SYS_TEXT_BASE
121
122 /*
123 * These are defined in the board-specific linker script.
124 * Subtracting _start from them lets the linker put their
125 * relative position in the executable instead of leaving
126 * them null.
127 */
128 .globl _bss_start_ofs
129 _bss_start_ofs:
130 .word __bss_start - _start
131
132 .globl _bss_end_ofs
133 _bss_end_ofs:
134 .word _end - _start
135
136 #ifdef CONFIG_USE_IRQ
137 /* IRQ stack memory (calculated at run-time) */
138 .globl IRQ_STACK_START
139 IRQ_STACK_START:
140 .word 0x0badc0de
141
142 /* IRQ stack memory (calculated at run-time) */
143 .globl FIQ_STACK_START
144 FIQ_STACK_START:
145 .word 0x0badc0de
146 #endif
147
148 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
149 /* IRQ stack memory (calculated at run-time) + 8 bytes */
150 .globl IRQ_STACK_START_IN
151 IRQ_STACK_START_IN:
152 .word 0x0badc0de
153
154 /*
155 * the actual reset code
156 */
157
158 reset:
159 /*
160 * set the cpu to SVC32 mode
161 */
162 mrs r0,cpsr
163 bic r0,r0,#0x1f
164 orr r0,r0,#0xd3
165 msr cpsr,r0
166
167 /*
168 * we do sys-critical inits only at reboot,
169 * not when booting from ram!
170 */
171 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
172 bl cpu_init_crit
173 #endif
174
175 /* Set stackpointer in internal RAM to call board_init_f */
176 call_board_init_f:
177 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
178 ldr r0,=0x00000000
179 bl board_init_f
180
181 /*------------------------------------------------------------------------------*/
182
183 /*
184 * void relocate_code (addr_sp, gd, addr_moni)
185 *
186 * This "function" does not return, instead it continues in RAM
187 * after relocating the monitor code.
188 *
189 */
190 .globl relocate_code
191 relocate_code:
192 mov r4, r0 /* save addr_sp */
193 mov r5, r1 /* save addr of gd */
194 mov r6, r2 /* save addr of destination */
195 mov r7, r2 /* save addr of destination */
196
197 /* Set up the stack */
198 stack_setup:
199 mov sp, r4
200
201 adr r0, _start
202 ldr r2, _TEXT_BASE
203 ldr r3, _bss_start_ofs
204 add r2, r0, r3 /* r2 <- source end address */
205 cmp r0, r6
206 beq clear_bss
207
208 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
209 copy_loop:
210 ldmia r0!, {r9-r10} /* copy from source address [r0] */
211 stmia r6!, {r9-r10} /* copy to target address [r1] */
212 cmp r0, r2 /* until source end address [r2] */
213 blo copy_loop
214
215 #ifndef CONFIG_PRELOADER
216 /*
217 * fix .rel.dyn relocations
218 */
219 ldr r0, _TEXT_BASE /* r0 <- Text base */
220 sub r9, r7, r0 /* r9 <- relocation offset */
221 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
222 add r10, r10, r0 /* r10 <- sym table in FLASH */
223 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
224 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
225 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
226 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
227 fixloop:
228 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
229 add r0, r9 /* r0 <- location to fix up in RAM */
230 ldr r1, [r2, #4]
231 and r8, r1, #0xff
232 cmp r8, #23 /* relative fixup? */
233 beq fixrel
234 cmp r8, #2 /* absolute fixup? */
235 beq fixabs
236 /* ignore unknown type of fixup */
237 b fixnext
238 fixabs:
239 /* absolute fix: set location to (offset) symbol value */
240 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
241 add r1, r10, r1 /* r1 <- address of symbol in table */
242 ldr r1, [r1, #4] /* r1 <- symbol value */
243 add r1, r9 /* r1 <- relocated sym addr */
244 b fixnext
245 fixrel:
246 /* relative fix: increase location by offset */
247 ldr r1, [r0]
248 add r1, r1, r9
249 fixnext:
250 str r1, [r0]
251 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
252 cmp r2, r3
253 blo fixloop
254 #endif
255 #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
256
257 clear_bss:
258 #ifndef CONFIG_PRELOADER
259 ldr r0, _bss_start_ofs
260 ldr r1, _bss_end_ofs
261 ldr r3, _TEXT_BASE /* Text base */
262 mov r4, r7 /* reloc addr */
263 add r0, r0, r4
264 add r1, r1, r4
265 mov r2, #0x00000000 /* clear */
266
267 clbss_l:str r2, [r0] /* clear loop... */
268 add r0, r0, #4
269 cmp r0, r1
270 bne clbss_l
271
272 bl coloured_LED_init
273 bl red_LED_on
274 #endif
275
276 /*
277 * We are done. Do not return, instead branch to second part of board
278 * initialization, now running from RAM.
279 */
280 #ifdef CONFIG_NAND_SPL
281 ldr r0, _nand_boot_ofs
282 mov pc, r0
283
284 _nand_boot_ofs:
285 .word nand_boot
286 #else
287 ldr r0, _board_init_r_ofs
288 adr r1, _start
289 add r0, r0, r1
290 add lr, r0, r9
291 /* setup parameters for board_init_r */
292 mov r0, r5 /* gd_t */
293 mov r1, r7 /* dest_addr */
294 /* jump to it ... */
295 mov pc, lr
296
297 _board_init_r_ofs:
298 .word board_init_r - _start
299 #endif
300
301 _rel_dyn_start_ofs:
302 .word __rel_dyn_start - _start
303 _rel_dyn_end_ofs:
304 .word __rel_dyn_end - _start
305 _dynsym_start_ofs:
306 .word __dynsym_start - _start
307
308 #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
309 /*
310 * the actual reset code
311 */
312
313 reset:
314 /*
315 * set the cpu to SVC32 mode
316 */
317 mrs r0,cpsr
318 bic r0,r0,#0x1f
319 orr r0,r0,#0xd3
320 msr cpsr,r0
321
322 /*
323 * we do sys-critical inits only at reboot,
324 * not when booting from ram!
325 */
326 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
327 bl cpu_init_crit
328 #endif
329
330 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
331 relocate: /* relocate U-Boot to RAM */
332 adr r0, _start /* r0 <- current position of code */
333 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
334 cmp r0, r1 /* don't reloc during debug */
335 beq stack_setup
336 ldr r3, _bss_start_ofs /* r3 <- _bss_start - _start */
337 add r2, r0, r3 /* r2 <- source end address */
338
339 copy_loop:
340 ldmia r0!, {r3-r10} /* copy from source address [r0] */
341 stmia r1!, {r3-r10} /* copy to target address [r1] */
342 cmp r0, r2 /* until source end address [r2] */
343 blo copy_loop
344 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
345
346 /* Set up the stack */
347 stack_setup:
348 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
349 sub sp, r0, #128 /* leave 32 words for abort-stack */
350 #ifndef CONFIG_PRELOADER
351 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
352 sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
353 #ifdef CONFIG_USE_IRQ
354 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
355 #endif
356 #endif /* CONFIG_PRELOADER */
357 sub sp, r0, #12 /* leave 3 words for abort-stack */
358 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
359
360 clear_bss:
361 adr r2, _start
362 ldr r0, _bss_start_ofs /* find start of bss segment */
363 add r0, r0, r2
364 ldr r1, _bss_end_ofs /* stop here */
365 add r1, r1, r2
366 mov r2, #0x00000000 /* clear */
367
368 #ifndef CONFIG_PRELOADER
369 clbss_l:str r2, [r0] /* clear loop... */
370 add r0, r0, #4
371 cmp r0, r1
372 blo clbss_l
373
374 bl coloured_LED_init
375 bl red_LED_on
376 #endif /* CONFIG_PRELOADER */
377
378 ldr r0, _start_armboot_ofs
379 adr r1, _start
380 add r0, r0, r1
381 ldr pc, r0
382
383 _start_armboot_ofs:
384 #ifdef CONFIG_NAND_SPL
385 .word nand_boot - _start
386 #else
387 .word start_armboot - _start
388 #endif /* CONFIG_NAND_SPL */
389 #endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
390
391 /*
392 *************************************************************************
393 *
394 * CPU_init_critical registers
395 *
396 * setup important registers
397 * setup memory timing
398 *
399 *************************************************************************
400 */
401 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
402 cpu_init_crit:
403 /*
404 * flush v4 I/D caches
405 */
406 mov r0, #0
407 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
408 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
409
410 /*
411 * disable MMU stuff and caches
412 */
413 mrc p15, 0, r0, c1, c0, 0
414 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
415 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
416 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
417 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
418 mcr p15, 0, r0, c1, c0, 0
419
420 /*
421 * Go setup Memory and board specific bits prior to relocation.
422 */
423 mov ip, lr /* perserve link reg across call */
424 bl lowlevel_init /* go setup pll,mux,memory */
425 mov lr, ip /* restore link */
426 mov pc, lr /* back to my caller */
427 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
428
429 #ifndef CONFIG_PRELOADER
430 /*
431 *************************************************************************
432 *
433 * Interrupt handling
434 *
435 *************************************************************************
436 */
437
438 @
439 @ IRQ stack frame.
440 @
441 #define S_FRAME_SIZE 72
442
443 #define S_OLD_R0 68
444 #define S_PSR 64
445 #define S_PC 60
446 #define S_LR 56
447 #define S_SP 52
448
449 #define S_IP 48
450 #define S_FP 44
451 #define S_R10 40
452 #define S_R9 36
453 #define S_R8 32
454 #define S_R7 28
455 #define S_R6 24
456 #define S_R5 20
457 #define S_R4 16
458 #define S_R3 12
459 #define S_R2 8
460 #define S_R1 4
461 #define S_R0 0
462
463 #define MODE_SVC 0x13
464 #define I_BIT 0x80
465
466 /*
467 * use bad_save_user_regs for abort/prefetch/undef/swi ...
468 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
469 */
470
471 .macro bad_save_user_regs
472 @ carve out a frame on current user stack
473 sub sp, sp, #S_FRAME_SIZE
474 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
475 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
476 adr r2, _start
477 sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
478 sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
479 #else
480 ldr r2, IRQ_STACK_START_IN
481 #endif
482 @ get values for "aborted" pc and cpsr (into parm regs)
483 ldmia r2, {r2 - r3}
484 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
485 add r5, sp, #S_SP
486 mov r1, lr
487 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
488 mov r0, sp @ save current stack into r0 (param register)
489 .endm
490
491 .macro irq_save_user_regs
492 sub sp, sp, #S_FRAME_SIZE
493 stmia sp, {r0 - r12} @ Calling r0-r12
494 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
495 add r8, sp, #S_PC
496 stmdb r8, {sp, lr}^ @ Calling SP, LR
497 str lr, [r8, #0] @ Save calling PC
498 mrs r6, spsr
499 str r6, [r8, #4] @ Save CPSR
500 str r0, [r8, #8] @ Save OLD_R0
501 mov r0, sp
502 .endm
503
504 .macro irq_restore_user_regs
505 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
506 mov r0, r0
507 ldr lr, [sp, #S_PC] @ Get PC
508 add sp, sp, #S_FRAME_SIZE
509 subs pc, lr, #4 @ return & move spsr_svc into cpsr
510 .endm
511
512 .macro get_bad_stack
513 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
514 adr r13, _start @ setup our mode stack
515 sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
516 sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
517 #else
518 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
519 #endif
520
521 str lr, [r13] @ save caller lr in position 0 of saved stack
522 mrs lr, spsr @ get the spsr
523 str lr, [r13, #4] @ save spsr in position 1 of saved stack
524 mov r13, #MODE_SVC @ prepare SVC-Mode
525 @ msr spsr_c, r13
526 msr spsr, r13 @ switch modes, make sure moves will execute
527 mov lr, pc @ capture return pc
528 movs pc, lr @ jump to next instruction & switch modes.
529 .endm
530
531 .macro get_irq_stack @ setup IRQ stack
532 ldr sp, IRQ_STACK_START
533 .endm
534
535 .macro get_fiq_stack @ setup FIQ stack
536 ldr sp, FIQ_STACK_START
537 .endm
538 #endif /* CONFIG_PRELOADER */
539
540 /*
541 * exception handlers
542 */
543 #ifdef CONFIG_PRELOADER
544 .align 5
545 do_hang:
546 ldr sp, _TEXT_BASE /* switch to abort stack */
547 1:
548 bl 1b /* hang and never return */
549 #else /* !CONFIG_PRELOADER */
550 .align 5
551 undefined_instruction:
552 get_bad_stack
553 bad_save_user_regs
554 bl do_undefined_instruction
555
556 .align 5
557 software_interrupt:
558 get_bad_stack
559 bad_save_user_regs
560 bl do_software_interrupt
561
562 .align 5
563 prefetch_abort:
564 get_bad_stack
565 bad_save_user_regs
566 bl do_prefetch_abort
567
568 .align 5
569 data_abort:
570 get_bad_stack
571 bad_save_user_regs
572 bl do_data_abort
573
574 .align 5
575 not_used:
576 get_bad_stack
577 bad_save_user_regs
578 bl do_not_used
579
580 #ifdef CONFIG_USE_IRQ
581
582 .align 5
583 irq:
584 get_irq_stack
585 irq_save_user_regs
586 bl do_irq
587 irq_restore_user_regs
588
589 .align 5
590 fiq:
591 get_fiq_stack
592 /* someone ought to write a more effiction fiq_save_user_regs */
593 irq_save_user_regs
594 bl do_fiq
595 irq_restore_user_regs
596
597 #else
598
599 .align 5
600 irq:
601 get_bad_stack
602 bad_save_user_regs
603 bl do_irq
604
605 .align 5
606 fiq:
607 get_bad_stack
608 bad_save_user_regs
609 bl do_fiq
610
611 #endif
612 #endif /* CONFIG_PRELOADER */