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Drop support for CONFIG_SYS_ARM_WITHOUT_RELOC
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1 /*
2 * armboot - Startup Code for ARM926EJS CPU-core
3 *
4 * Copyright (c) 2003 Texas Instruments
5 *
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
7 *
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
33 #include <asm-offsets.h>
34 #include <config.h>
35 #include <version.h>
36
37 /*
38 *************************************************************************
39 *
40 * Jump vector table as in table 3.1 in [1]
41 *
42 *************************************************************************
43 */
44
45
46 .globl _start
47 _start:
48 b reset
49 ldr pc, _undefined_instruction
50 ldr pc, _software_interrupt
51 ldr pc, _prefetch_abort
52 ldr pc, _data_abort
53 ldr pc, _not_used
54 ldr pc, _irq
55 ldr pc, _fiq
56
57 _undefined_instruction:
58 .word undefined_instruction
59 _software_interrupt:
60 .word software_interrupt
61 _prefetch_abort:
62 .word prefetch_abort
63 _data_abort:
64 .word data_abort
65 _not_used:
66 .word not_used
67 _irq:
68 .word irq
69 _fiq:
70 .word fiq
71
72 .balignl 16,0xdeadbeef
73
74
75 /*
76 *************************************************************************
77 *
78 * Startup Code (reset vector)
79 *
80 * do important init only if we don't start from memory!
81 * setup Memory and board specific bits prior to relocation.
82 * relocate armboot to ram
83 * setup stack
84 *
85 *************************************************************************
86 */
87
88 .globl _TEXT_BASE
89 _TEXT_BASE:
90 .word CONFIG_SYS_TEXT_BASE
91
92 /*
93 * These are defined in the board-specific linker script.
94 */
95 .globl _bss_start
96 _bss_start:
97 .word __bss_start
98
99 .globl _bss_end
100 _bss_end:
101 .word _end
102
103 #ifdef CONFIG_USE_IRQ
104 /* IRQ stack memory (calculated at run-time) */
105 .globl IRQ_STACK_START
106 IRQ_STACK_START:
107 .word 0x0badc0de
108
109 /* IRQ stack memory (calculated at run-time) */
110 .globl FIQ_STACK_START
111 FIQ_STACK_START:
112 .word 0x0badc0de
113 #endif
114
115 /* IRQ stack memory (calculated at run-time) + 8 bytes */
116 .globl IRQ_STACK_START_IN
117 IRQ_STACK_START_IN:
118 .word 0x0badc0de
119
120 .globl _datarel_start
121 _datarel_start:
122 .word __datarel_start
123
124 .globl _datarelrolocal_start
125 _datarelrolocal_start:
126 .word __datarelrolocal_start
127
128 .globl _datarellocal_start
129 _datarellocal_start:
130 .word __datarellocal_start
131
132 .globl _datarelro_start
133 _datarelro_start:
134 .word __datarelro_start
135
136 .globl _got_start
137 _got_start:
138 .word __got_start
139
140 .globl _got_end
141 _got_end:
142 .word __got_end
143
144 /*
145 * the actual reset code
146 */
147
148 reset:
149 /*
150 * set the cpu to SVC32 mode
151 */
152 mrs r0,cpsr
153 bic r0,r0,#0x1f
154 orr r0,r0,#0xd3
155 msr cpsr,r0
156
157 /*
158 * we do sys-critical inits only at reboot,
159 * not when booting from ram!
160 */
161 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
162 bl cpu_init_crit
163 #endif
164
165 /* Set stackpointer in internal RAM to call board_init_f */
166 call_board_init_f:
167 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
168 ldr r0,=0x00000000
169 bl board_init_f
170
171 /*------------------------------------------------------------------------------*/
172
173 /*
174 * void relocate_code (addr_sp, gd, addr_moni)
175 *
176 * This "function" does not return, instead it continues in RAM
177 * after relocating the monitor code.
178 *
179 */
180 .globl relocate_code
181 relocate_code:
182 mov r4, r0 /* save addr_sp */
183 mov r5, r1 /* save addr of gd */
184 mov r6, r2 /* save addr of destination */
185 mov r7, r2 /* save addr of destination */
186
187 /* Set up the stack */
188 stack_setup:
189 mov sp, r4
190
191 adr r0, _start
192 ldr r2, _TEXT_BASE
193 ldr r3, _bss_start
194 sub r2, r3, r2 /* r2 <- size of armboot */
195 add r2, r0, r2 /* r2 <- source end address */
196 cmp r0, r6
197 beq clear_bss
198
199 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
200 copy_loop:
201 ldmia r0!, {r9-r10} /* copy from source address [r0] */
202 stmia r6!, {r9-r10} /* copy to target address [r1] */
203 cmp r0, r2 /* until source end address [r2] */
204 blo copy_loop
205
206 #ifndef CONFIG_PRELOADER
207 /* fix got entries */
208 ldr r1, _TEXT_BASE /* Text base */
209 mov r0, r7 /* reloc addr */
210 ldr r2, _got_start /* addr in Flash */
211 ldr r3, _got_end /* addr in Flash */
212 sub r3, r3, r1
213 add r3, r3, r0
214 sub r2, r2, r1
215 add r2, r2, r0
216
217 fixloop:
218 ldr r4, [r2]
219 sub r4, r4, r1
220 add r4, r4, r0
221 str r4, [r2]
222 add r2, r2, #4
223 cmp r2, r3
224 blo fixloop
225 #endif
226 #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
227
228 clear_bss:
229 #ifndef CONFIG_PRELOADER
230 ldr r0, _bss_start
231 ldr r1, _bss_end
232 ldr r3, _TEXT_BASE /* Text base */
233 mov r4, r7 /* reloc addr */
234 sub r0, r0, r3
235 add r0, r0, r4
236 sub r1, r1, r3
237 add r1, r1, r4
238 mov r2, #0x00000000 /* clear */
239
240 clbss_l:str r2, [r0] /* clear loop... */
241 add r0, r0, #4
242 cmp r0, r1
243 bne clbss_l
244 #endif
245
246 /*
247 * We are done. Do not return, instead branch to second part of board
248 * initialization, now running from RAM.
249 */
250 #ifdef CONFIG_NAND_SPL
251 ldr pc, _nand_boot
252
253 _nand_boot: .word nand_boot
254 #else
255 ldr r0, _TEXT_BASE
256 ldr r2, _board_init_r
257 sub r2, r2, r0
258 add r2, r2, r7 /* position from board_init_r in RAM */
259 /* setup parameters for board_init_r */
260 mov r0, r5 /* gd_t */
261 mov r1, r7 /* dest_addr */
262 /* jump to it ... */
263 mov lr, r2
264 mov pc, lr
265
266 _board_init_r: .word board_init_r
267 #endif
268
269 /*
270 *************************************************************************
271 *
272 * CPU_init_critical registers
273 *
274 * setup important registers
275 * setup memory timing
276 *
277 *************************************************************************
278 */
279
280
281 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
282 cpu_init_crit:
283 /*
284 * flush v4 I/D caches
285 */
286 mov r0, #0
287 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
288 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
289
290 /*
291 * disable MMU stuff and caches
292 */
293 mrc p15, 0, r0, c1, c0, 0
294 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
295 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
296 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
297 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
298 mcr p15, 0, r0, c1, c0, 0
299
300 /*
301 * Go setup Memory and board specific bits prior to relocation.
302 */
303 mov ip, lr /* perserve link reg across call */
304 bl lowlevel_init /* go setup memory */
305 mov lr, ip /* restore link */
306 mov pc, lr /* back to my caller */
307 #endif
308 /*
309 *************************************************************************
310 *
311 * Interrupt handling
312 *
313 *************************************************************************
314 */
315
316 @
317 @ IRQ stack frame.
318 @
319 #define S_FRAME_SIZE 72
320
321 #define S_OLD_R0 68
322 #define S_PSR 64
323 #define S_PC 60
324 #define S_LR 56
325 #define S_SP 52
326
327 #define S_IP 48
328 #define S_FP 44
329 #define S_R10 40
330 #define S_R9 36
331 #define S_R8 32
332 #define S_R7 28
333 #define S_R6 24
334 #define S_R5 20
335 #define S_R4 16
336 #define S_R3 12
337 #define S_R2 8
338 #define S_R1 4
339 #define S_R0 0
340
341 #define MODE_SVC 0x13
342 #define I_BIT 0x80
343
344 /*
345 * use bad_save_user_regs for abort/prefetch/undef/swi ...
346 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
347 */
348
349 .macro bad_save_user_regs
350 @ carve out a frame on current user stack
351 sub sp, sp, #S_FRAME_SIZE
352 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
353
354 ldr r2, IRQ_STACK_START_IN
355 @ get values for "aborted" pc and cpsr (into parm regs)
356 ldmia r2, {r2 - r3}
357 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
358 add r5, sp, #S_SP
359 mov r1, lr
360 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
361 mov r0, sp @ save current stack into r0 (param register)
362 .endm
363
364 .macro irq_save_user_regs
365 sub sp, sp, #S_FRAME_SIZE
366 stmia sp, {r0 - r12} @ Calling r0-r12
367 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
368 add r8, sp, #S_PC
369 stmdb r8, {sp, lr}^ @ Calling SP, LR
370 str lr, [r8, #0] @ Save calling PC
371 mrs r6, spsr
372 str r6, [r8, #4] @ Save CPSR
373 str r0, [r8, #8] @ Save OLD_R0
374 mov r0, sp
375 .endm
376
377 .macro irq_restore_user_regs
378 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
379 mov r0, r0
380 ldr lr, [sp, #S_PC] @ Get PC
381 add sp, sp, #S_FRAME_SIZE
382 subs pc, lr, #4 @ return & move spsr_svc into cpsr
383 .endm
384
385 .macro get_bad_stack
386 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
387
388 str lr, [r13] @ save caller lr in position 0 of saved stack
389 mrs lr, spsr @ get the spsr
390 str lr, [r13, #4] @ save spsr in position 1 of saved stack
391 mov r13, #MODE_SVC @ prepare SVC-Mode
392 @ msr spsr_c, r13
393 msr spsr, r13 @ switch modes, make sure moves will execute
394 mov lr, pc @ capture return pc
395 movs pc, lr @ jump to next instruction & switch modes.
396 .endm
397
398 .macro get_irq_stack @ setup IRQ stack
399 ldr sp, IRQ_STACK_START
400 .endm
401
402 .macro get_fiq_stack @ setup FIQ stack
403 ldr sp, FIQ_STACK_START
404 .endm
405
406 /*
407 * exception handlers
408 */
409 .align 5
410 undefined_instruction:
411 get_bad_stack
412 bad_save_user_regs
413 bl do_undefined_instruction
414
415 .align 5
416 software_interrupt:
417 get_bad_stack
418 bad_save_user_regs
419 bl do_software_interrupt
420
421 .align 5
422 prefetch_abort:
423 get_bad_stack
424 bad_save_user_regs
425 bl do_prefetch_abort
426
427 .align 5
428 data_abort:
429 get_bad_stack
430 bad_save_user_regs
431 bl do_data_abort
432
433 .align 5
434 not_used:
435 get_bad_stack
436 bad_save_user_regs
437 bl do_not_used
438
439 #ifdef CONFIG_USE_IRQ
440
441 .align 5
442 irq:
443 get_irq_stack
444 irq_save_user_regs
445 bl do_irq
446 irq_restore_user_regs
447
448 .align 5
449 fiq:
450 get_fiq_stack
451 /* someone ought to write a more effiction fiq_save_user_regs */
452 irq_save_user_regs
453 bl do_fiq
454 irq_restore_user_regs
455
456 #else
457
458 .align 5
459 irq:
460 get_bad_stack
461 bad_save_user_regs
462 bl do_irq
463
464 .align 5
465 fiq:
466 get_bad_stack
467 bad_save_user_regs
468 bl do_fiq
469
470 #endif
471
472 # ifdef CONFIG_INTEGRATOR
473
474 /* Satisfied by general board level routine */
475
476 #else
477
478 .align 5
479 .globl reset_cpu
480 reset_cpu:
481
482 ldr r1, rstctl1 /* get clkm1 reset ctl */
483 mov r3, #0x0
484 strh r3, [r1] /* clear it */
485 mov r3, #0x8
486 strh r3, [r1] /* force dsp+arm reset */
487 _loop_forever:
488 b _loop_forever
489
490 rstctl1:
491 .word 0xfffece10
492
493 #endif /* #ifdef CONFIG_INTEGRATOR */