arch/arm/cpu/armv7/omap-common/timer.c

   1 /*
   2  * (C) Copyright 2008
   3  * Texas Instruments
   4  *
   5  * Richard Woodruff <r-woodruff2@ti.com>
   6  * Syed Moahmmed Khasim <khasim@ti.com>
   7  *
   8  * (C) Copyright 2002
   9  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  10  * Marius Groeger <mgroeger@sysgo.de>
  11  * Alex Zuepke <azu@sysgo.de>
  12  *
  13  * (C) Copyright 2002
  14  * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  15  *
  16  * SPDX-License-Identifier:     GPL-2.0+
  17  */
  18
  19 #include <common.h>
  20 #include <asm/io.h>
  21 #include <asm/arch/cpu.h>
  22 #include <asm/arch/clock.h>
  23
  24 DECLARE_GLOBAL_DATA_PTR;
  25
  26 static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
  27
  28 /*
  29  * Nothing really to do with interrupts, just starts up a counter.
  30  */
  31
  32 #define TIMER_CLOCK             (V_SCLK / (2 << CONFIG_SYS_PTV))
  33 #define TIMER_OVERFLOW_VAL      0xffffffff
  34 #define TIMER_LOAD_VAL          0
  35
  36 int timer_init(void)
  37 {
  38         /* start the counter ticking up, reload value on overflow */
  39         writel(TIMER_LOAD_VAL, &timer_base->tldr);
  40         /* enable timer */
  41         writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
  42                 &timer_base->tclr);
  43
  44         /* reset time, capture current incrementer value time */
  45         gd->arch.lastinc = readl(&timer_base->tcrr) /
  46                                         (TIMER_CLOCK / CONFIG_SYS_HZ);
  47         gd->arch.tbl = 0;       /* start "advancing" time stamp from 0 */
  48
  49         return 0;
  50 }
  51
  52 /*
  53  * timer without interrupts
  54  */
  55 ulong get_timer(ulong base)
  56 {
  57         return get_timer_masked() - base;
  58 }
  59
  60 /* delay x useconds */
  61 void __udelay(unsigned long usec)
  62 {
  63         long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
  64         unsigned long now, last = readl(&timer_base->tcrr);
  65
  66         while (tmo > 0) {
  67                 now = readl(&timer_base->tcrr);
  68                 if (last > now) /* count up timer overflow */
  69                         tmo -= TIMER_OVERFLOW_VAL - last + now + 1;
  70                 else
  71                         tmo -= now - last;
  72                 last = now;
  73         }
  74 }
  75
  76 ulong get_timer_masked(void)
  77 {
  78         /* current tick value */
  79         ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
  80
  81         if (now >= gd->arch.lastinc) {  /* normal mode (non roll) */
  82                 /* move stamp fordward with absoulte diff ticks */
  83                 gd->arch.tbl += (now - gd->arch.lastinc);
  84         } else {        /* we have rollover of incrementer */
  85                 gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK /
  86                                 CONFIG_SYS_HZ)) - gd->arch.lastinc) + now;
  87         }
  88         gd->arch.lastinc = now;
  89         return gd->arch.tbl;
  90 }
  91
  92 /*
  93  * This function is derived from PowerPC code (read timebase as long long).
  94  * On ARM it just returns the timer value.
  95  */
  96 unsigned long long get_ticks(void)
  97 {
  98         return get_timer(0);
  99 }
 100
 101 /*
 102  * This function is derived from PowerPC code (timebase clock frequency).
 103  * On ARM it returns the number of timer ticks per second.
 104  */
 105 ulong get_tbclk(void)
 106 {
 107         return CONFIG_SYS_HZ;
 108 }