arch/arm/dts/dragonboard820c.dts

   1 /*
   2  * Qualcomm APQ8096 based Dragonboard 820C board device tree source
   3  *
   4  * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 /dts-v1/;
  10
  11 #include "skeleton64.dtsi"
  12
  13 / {
  14         model = "Qualcomm Technologies, Inc. DB820c";
  15         compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 serial0 = &blsp2_uart1;
  21         };
  22
  23         chosen {
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         memory {
  28                 device_type = "memory";
  29                 reg = <0 0x80000000 0 0xc0000000>;
  30         };
  31
  32         psci {
  33                 compatible = "arm,psci-1.0";
  34                 method = "smc";
  35         };
  36
  37         soc: soc {
  38                 #address-cells = <1>;
  39                 #size-cells = <1>;
  40                 ranges = <0 0 0 0xffffffff>;
  41                 compatible = "simple-bus";
  42
  43                 gcc: clock-controller@300000 {
  44                         compatible = "qcom,gcc-msm8996";
  45                         #clock-cells = <1>;
  46                         #reset-cells = <1>;
  47                         #power-domain-cells = <1>;
  48                         reg = <0x300000 0x90000>;
  49                 };
  50
  51                 blsp2_uart1: serial@75b0000 {
  52                         compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
  53                         reg = <0x75b0000 0x1000>;
  54                 };
  55
  56                 sdhc2: sdhci@74a4900 {
  57                          compatible = "qcom,sdhci-msm-v4";
  58                          reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
  59                          index = <0x0>;
  60                          bus-width = <4>;
  61                          clock = <&gcc 0>;
  62                         clock-frequency = <200000000>;
  63                  };
  64         };
  65 };