arch/arm/dts/imx6ul-geam-kit.dts

   1 /*
   2  * Copyright (C) 2016 Amarula Solutions B.V.
   3  * Copyright (C) 2016 Engicam S.r.l.
   4  *
   5  * This file is dual-licensed: you can use it either under the terms
   6  * of the GPL or the X11 license, at your option. Note that this dual
   7  * licensing only applies to this file, and not this project as a
   8  * whole.
   9  *
  10  *  a) This file is free software; you can redistribute it and/or
  11  *     modify it under the terms of the GNU General Public License
  12  *     version 2 as published by the Free Software Foundation.
  13  *
  14  *     This file is distributed in the hope that it will be useful
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /dts-v1/;
  44
  45 #include <dt-bindings/gpio/gpio.h>
  46 #include <dt-bindings/input/input.h>
  47 #include "imx6ul.dtsi"
  48
  49 / {
  50         model = "Engicam GEAM6UL";
  51         compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
  52
  53         memory {
  54                 reg = <0x80000000 0x08000000>;
  55         };
  56
  57         chosen {
  58                 stdout-path = &uart1;
  59         };
  60 };
  61
  62 &uart1 {
  63         pinctrl-names = "default";
  64         pinctrl-0 = <&pinctrl_uart1>;
  65         status = "okay";
  66 };
  67
  68 &usdhc1 {
  69         pinctrl-names = "default", "state_100mhz", "state_200mhz";
  70         pinctrl-0 = <&pinctrl_usdhc1>;
  71         pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
  72         pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
  73         bus-width = <4>;
  74         cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
  75         no-1-8-v;
  76         status = "okay";
  77 };
  78
  79 &iomuxc {
  80         pinctrl_uart1: uart1grp {
  81                 fsl,pins = <
  82                         MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
  83                         MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
  84                 >;
  85         };
  86
  87         pinctrl_usdhc1: usdhc1grp {
  88                 fsl,pins = <
  89                         MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
  90                         MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10059
  91                         MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
  92                         MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
  93                         MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
  94                         MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
  95                 >;
  96         };
  97
  98         pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
  99                 fsl,pins = <
 100                         MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
 101                         MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
 102                         MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
 103                         MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
 104                         MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
 105                         MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
 106                 >;
 107         };
 108
 109         pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
 110                 fsl,pins = <
 111                         MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
 112                         MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
 113                         MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
 114                         MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
 115                         MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
 116                         MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
 117                 >;
 118         };
 119 };