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aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation
[people/ms/u-boot.git] / arch / arm / dts / keystone-k2e-evm.dts
1 /*
2 * Copyright 2013-2014 Texas Instruments, Inc.
3 *
4 * Keystone 2 Edison EVM device tree
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 /dts-v1/;
11
12 #include "keystone.dtsi"
13 #include "keystone-k2e.dtsi"
14
15 / {
16 compatible = "ti,k2e-evm","ti,keystone";
17 model = "Texas Instruments Keystone 2 Edison EVM";
18
19 soc {
20
21 clocks {
22 refclksys: refclksys {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <100000000>;
26 clock-output-names = "refclk-sys";
27 };
28
29 refclkpass: refclkpass {
30 #clock-cells = <0>;
31 compatible = "fixed-clock";
32 clock-frequency = <100000000>;
33 clock-output-names = "refclk-pass";
34 };
35
36 refclkddr3a: refclkddr3a {
37 #clock-cells = <0>;
38 compatible = "fixed-clock";
39 clock-frequency = <100000000>;
40 clock-output-names = "refclk-ddr3a";
41 };
42 };
43 };
44 };
45
46 &usb_phy {
47 status = "okay";
48 };
49
50 &usb {
51 status = "okay";
52 };
53
54 &usb1_phy {
55 status = "okay";
56 };
57
58 &usb1 {
59 status = "okay";
60 };
61
62 &i2c0 {
63 dtt@50 {
64 compatible = "at,24c1024";
65 reg = <0x50>;
66 };
67 };
68
69 &aemif {
70 cs0 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 clock-ranges;
74 ranges;
75
76 ti,cs-chipselect = <0>;
77 /* all timings in nanoseconds */
78 ti,cs-min-turnaround-ns = <12>;
79 ti,cs-read-hold-ns = <6>;
80 ti,cs-read-strobe-ns = <23>;
81 ti,cs-read-setup-ns = <9>;
82 ti,cs-write-hold-ns = <8>;
83 ti,cs-write-strobe-ns = <23>;
84 ti,cs-write-setup-ns = <8>;
85
86 nand@0,0 {
87 compatible = "ti,keystone-nand","ti,davinci-nand";
88 #address-cells = <1>;
89 #size-cells = <1>;
90 reg = <0 0 0x4000000
91 1 0 0x0000100>;
92
93 ti,davinci-chipselect = <0>;
94 ti,davinci-mask-ale = <0x2000>;
95 ti,davinci-mask-cle = <0x4000>;
96 ti,davinci-mask-chipsel = <0>;
97 nand-ecc-mode = "hw";
98 ti,davinci-ecc-bits = <4>;
99 nand-on-flash-bbt;
100
101 partition@0 {
102 label = "u-boot";
103 reg = <0x0 0x100000>;
104 read-only;
105 };
106
107 partition@100000 {
108 label = "params";
109 reg = <0x100000 0x80000>;
110 read-only;
111 };
112
113 partition@180000 {
114 label = "ubifs";
115 reg = <0x180000 0x1FE80000>;
116 };
117 };
118 };
119 };
120
121 &spi0 {
122 status = "okay";
123 nor_flash: n25q128a11@0 {
124 #address-cells = <1>;
125 #size-cells = <1>;
126 compatible = "Micron,n25q128a11", "spi-flash";
127 spi-max-frequency = <54000000>;
128 m25p,fast-read;
129 reg = <0>;
130
131 partition@0 {
132 label = "u-boot-spl";
133 reg = <0x0 0x80000>;
134 read-only;
135 };
136
137 partition@1 {
138 label = "misc";
139 reg = <0x80000 0xf80000>;
140 };
141 };
142 };
143
144 &mdio {
145 status = "ok";
146 ethphy0: ethernet-phy@0 {
147 compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
148 reg = <0>;
149 };
150
151 ethphy1: ethernet-phy@1 {
152 compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
153 reg = <1>;
154 };
155 };