arch/arm/dts/r8a7795-h3ulcb.dts

   1 /*
   2  * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  * Copyright (C) 2016 Cogent Embedded, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 /dts-v1/;
  13 #include "r8a7795.dtsi"
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/input/input.h>
  16
  17 / {
  18         model = "Renesas H3ULCB board based on r8a7795";
  19         compatible = "renesas,h3ulcb", "renesas,r8a7795";
  20
  21         aliases {
  22                 serial0 = &scif2;
  23                 ethernet0 = &avb;
  24         };
  25
  26         chosen {
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         memory@48000000 {
  31                 device_type = "memory";
  32                 /* first 128MB is reserved for secure area. */
  33                 reg = <0x0 0x48000000 0x0 0x38000000>;
  34         };
  35
  36         memory@500000000 {
  37                 device_type = "memory";
  38                 reg = <0x5 0x00000000 0x0 0x40000000>;
  39         };
  40
  41         memory@600000000 {
  42                 device_type = "memory";
  43                 reg = <0x6 0x00000000 0x0 0x40000000>;
  44         };
  45
  46         memory@700000000 {
  47                 device_type = "memory";
  48                 reg = <0x7 0x00000000 0x0 0x40000000>;
  49         };
  50
  51         leds {
  52                 compatible = "gpio-leds";
  53
  54                 led5 {
  55                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  56                 };
  57                 led6 {
  58                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  59                 };
  60         };
  61
  62         keyboard {
  63                 compatible = "gpio-keys";
  64
  65                 key-1 {
  66                         linux,code = <KEY_1>;
  67                         label = "SW3";
  68                         wakeup-source;
  69                         debounce-interval = <20>;
  70                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  71                 };
  72         };
  73
  74         x12_clk: x12 {
  75                 compatible = "fixed-clock";
  76                 #clock-cells = <0>;
  77                 clock-frequency = <24576000>;
  78         };
  79
  80         reg_1p8v: regulator0 {
  81                 compatible = "regulator-fixed";
  82                 regulator-name = "fixed-1.8V";
  83                 regulator-min-microvolt = <1800000>;
  84                 regulator-max-microvolt = <1800000>;
  85                 regulator-boot-on;
  86                 regulator-always-on;
  87         };
  88
  89         reg_3p3v: regulator1 {
  90                 compatible = "regulator-fixed";
  91                 regulator-name = "fixed-3.3V";
  92                 regulator-min-microvolt = <3300000>;
  93                 regulator-max-microvolt = <3300000>;
  94                 regulator-boot-on;
  95                 regulator-always-on;
  96         };
  97
  98         vcc_sdhi0: regulator-vcc-sdhi0 {
  99                 compatible = "regulator-fixed";
 100
 101                 regulator-name = "SDHI0 Vcc";
 102                 regulator-min-microvolt = <3300000>;
 103                 regulator-max-microvolt = <3300000>;
 104
 105                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 106                 enable-active-high;
 107         };
 108
 109         vccq_sdhi0: regulator-vccq-sdhi0 {
 110                 compatible = "regulator-gpio";
 111
 112                 regulator-name = "SDHI0 VccQ";
 113                 regulator-min-microvolt = <1800000>;
 114                 regulator-max-microvolt = <3300000>;
 115
 116                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 117                 gpios-states = <1>;
 118                 states = <3300000 1
 119                           1800000 0>;
 120         };
 121
 122         audio_clkout: audio-clkout {
 123                 /*
 124                  * This is same as <&rcar_sound 0>
 125                  * but needed to avoid cs2000/rcar_sound probe dead-lock
 126                  */
 127                 compatible = "fixed-clock";
 128                 #clock-cells = <0>;
 129                 clock-frequency = <11289600>;
 130         };
 131
 132         rsnd_ak4613: sound {
 133                 compatible = "simple-audio-card";
 134
 135                 simple-audio-card,format = "left_j";
 136                 simple-audio-card,bitclock-master = <&sndcpu>;
 137                 simple-audio-card,frame-master = <&sndcpu>;
 138
 139                 sndcpu: simple-audio-card,cpu {
 140                         sound-dai = <&rcar_sound>;
 141                 };
 142
 143                 sndcodec: simple-audio-card,codec {
 144                         sound-dai = <&ak4613>;
 145                 };
 146         };
 147 };
 148
 149 &extal_clk {
 150         clock-frequency = <16666666>;
 151 };
 152
 153 &extalr_clk {
 154         clock-frequency = <32768>;
 155 };
 156
 157 &pfc {
 158         pinctrl-0 = <&scif_clk_pins>;
 159         pinctrl-names = "default";
 160
 161         scif2_pins: scif2 {
 162                 groups = "scif2_data_a";
 163                 function = "scif2";
 164         };
 165
 166         scif_clk_pins: scif_clk {
 167                 groups = "scif_clk_a";
 168                 function = "scif_clk";
 169         };
 170
 171         i2c2_pins: i2c2 {
 172                 groups = "i2c2_a";
 173                 function = "i2c2";
 174         };
 175
 176         avb_pins: avb {
 177                 groups = "avb_mdc";
 178                 function = "avb";
 179         };
 180
 181         sdhi0_pins: sd0 {
 182                 groups = "sdhi0_data4", "sdhi0_ctrl";
 183                 function = "sdhi0";
 184                 power-source = <3300>;
 185         };
 186
 187         sdhi0_pins_uhs: sd0_uhs {
 188                 groups = "sdhi0_data4", "sdhi0_ctrl";
 189                 function = "sdhi0";
 190                 power-source = <1800>;
 191         };
 192
 193         sdhi2_pins: sd2 {
 194                 groups = "sdhi2_data8", "sdhi2_ctrl";
 195                 function = "sdhi2";
 196                 power-source = <3300>;
 197         };
 198
 199         sdhi2_pins_uhs: sd2_uhs {
 200                 groups = "sdhi2_data8", "sdhi2_ctrl";
 201                 function = "sdhi2";
 202                 power-source = <1800>;
 203         };
 204
 205         sound_pins: sound {
 206                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 207                 function = "ssi";
 208         };
 209
 210         sound_clk_pins: sound-clk {
 211                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 212                          "audio_clkout_a", "audio_clkout3_a";
 213                 function = "audio_clk";
 214         };
 215
 216         usb1_pins: usb1 {
 217                 groups = "usb1";
 218                 function = "usb1";
 219         };
 220 };
 221
 222 &scif2 {
 223         pinctrl-0 = <&scif2_pins>;
 224         pinctrl-names = "default";
 225
 226         status = "okay";
 227 };
 228
 229 &scif_clk {
 230         clock-frequency = <14745600>;
 231 };
 232
 233 &i2c2 {
 234         pinctrl-0 = <&i2c2_pins>;
 235         pinctrl-names = "default";
 236
 237         status = "okay";
 238
 239         clock-frequency = <100000>;
 240
 241         ak4613: codec@10 {
 242                 compatible = "asahi-kasei,ak4613";
 243                 #sound-dai-cells = <0>;
 244                 reg = <0x10>;
 245                 clocks = <&rcar_sound 3>;
 246
 247                 asahi-kasei,in1-single-end;
 248                 asahi-kasei,in2-single-end;
 249                 asahi-kasei,out1-single-end;
 250                 asahi-kasei,out2-single-end;
 251                 asahi-kasei,out3-single-end;
 252                 asahi-kasei,out4-single-end;
 253                 asahi-kasei,out5-single-end;
 254                 asahi-kasei,out6-single-end;
 255         };
 256
 257         cs2000: clk-multiplier@4f {
 258                 #clock-cells = <0>;
 259                 compatible = "cirrus,cs2000-cp";
 260                 reg = <0x4f>;
 261                 clocks = <&audio_clkout>, <&x12_clk>;
 262                 clock-names = "clk_in", "ref_clk";
 263
 264                 assigned-clocks = <&cs2000>;
 265                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 266         };
 267 };
 268
 269 &rcar_sound {
 270         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 271         pinctrl-names = "default";
 272
 273         /* Single DAI */
 274         #sound-dai-cells = <0>;
 275
 276         /* audio_clkout0/1/2/3 */
 277         #clock-cells = <1>;
 278         clock-frequency = <11289600>;
 279
 280         status = "okay";
 281
 282         /* update <audio_clk_b> to <cs2000> */
 283         clocks = <&cpg CPG_MOD 1005>,
 284                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 285                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 286                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 287                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 288                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 289                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 290                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 291                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 292                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 293                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 294                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 295                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 296                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 297                  <&audio_clk_a>, <&cs2000>,
 298                  <&audio_clk_c>,
 299                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 300
 301         rcar_sound,dai {
 302                 dai0 {
 303                         playback = <&ssi0 &src0 &dvc0>;
 304                         capture  = <&ssi1 &src1 &dvc1>;
 305                 };
 306         };
 307 };
 308
 309 &sdhi0 {
 310         pinctrl-0 = <&sdhi0_pins>;
 311         pinctrl-1 = <&sdhi0_pins_uhs>;
 312         pinctrl-names = "default", "state_uhs";
 313
 314         vmmc-supply = <&vcc_sdhi0>;
 315         vqmmc-supply = <&vccq_sdhi0>;
 316         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 317         bus-width = <4>;
 318         sd-uhs-sdr50;
 319         status = "okay";
 320 };
 321
 322 &sdhi2 {
 323         /* used for on-board 8bit eMMC */
 324         pinctrl-0 = <&sdhi2_pins>;
 325         pinctrl-1 = <&sdhi2_pins_uhs>;
 326         pinctrl-names = "default", "state_uhs";
 327
 328         vmmc-supply = <&reg_3p3v>;
 329         vqmmc-supply = <&reg_1p8v>;
 330         bus-width = <8>;
 331         non-removable;
 332         status = "okay";
 333 };
 334
 335 &ssi1 {
 336         shared-pin;
 337 };
 338
 339 &wdt0 {
 340         timeout-sec = <60>;
 341         status = "okay";
 342 };
 343
 344 &audio_clk_a {
 345         clock-frequency = <22579200>;
 346 };
 347
 348 &avb {
 349         pinctrl-0 = <&avb_pins>;
 350         pinctrl-names = "default";
 351         renesas,no-ether-link;
 352         phy-handle = <&phy0>;
 353         status = "okay";
 354
 355         phy0: ethernet-phy@0 {
 356                 rxc-skew-ps = <1500>;
 357                 reg = <0>;
 358                 interrupt-parent = <&gpio2>;
 359                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 360         };
 361 };
 362
 363 &usb2_phy1 {
 364         pinctrl-0 = <&usb1_pins>;
 365         pinctrl-names = "default";
 366
 367         status = "okay";
 368 };
 369
 370 &ehci1 {
 371         status = "okay";
 372 };
 373
 374 &ohci1 {
 375         status = "okay";
 376 };