arch/arm/dts/r8a77995-draak.dts

   1 /*
   2  * Device Tree Source for the Draak board
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  * Copyright (C) 2017 Glider bvba
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 /dts-v1/;
  13 #include "r8a77995.dtsi"
  14 #include <dt-bindings/gpio/gpio.h>
  15
  16 / {
  17         model = "Renesas Draak board based on r8a77995";
  18         compatible = "renesas,draak", "renesas,r8a77995";
  19
  20         aliases {
  21                 serial0 = &scif2;
  22                 ethernet0 = &avb;
  23         };
  24
  25         chosen {
  26                 bootargs = "ignore_loglevel";
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         memory@48000000 {
  31                 device_type = "memory";
  32                 /* first 128MB is reserved for secure area. */
  33                 reg = <0x0 0x48000000 0x0 0x18000000>;
  34         };
  35 };
  36
  37 &extal_clk {
  38         clock-frequency = <48000000>;
  39 };
  40
  41 &pfc {
  42         avb0_pins: avb {
  43                 mux {
  44                         groups = "avb0_link", "avb0_mdc", "avb0_mii";
  45                         function = "avb0";
  46                 };
  47         };
  48
  49         pwm0_pins: pwm0 {
  50                 groups = "pwm0_c";
  51                 function = "pwm0";
  52         };
  53
  54         pwm1_pins: pwm1 {
  55                 groups = "pwm1_c";
  56                 function = "pwm1";
  57         };
  58
  59         scif2_pins: scif2 {
  60                 groups = "scif2_data";
  61                 function = "scif2";
  62         };
  63
  64         usb0_pins: usb0 {
  65                 groups = "usb0";
  66                 function = "usb0";
  67         };
  68 };
  69
  70 &ehci0 {
  71         status = "okay";
  72 };
  73
  74 &ohci0 {
  75         status = "okay";
  76 };
  77
  78 &avb {
  79         pinctrl-0 = <&avb0_pins>;
  80         pinctrl-names = "default";
  81         renesas,no-ether-link;
  82         phy-handle = <&phy0>;
  83         status = "okay";
  84
  85         phy0: ethernet-phy@0 {
  86                 rxc-skew-ps = <1500>;
  87                 reg = <0>;
  88                 interrupt-parent = <&gpio5>;
  89                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
  90         };
  91 };
  92
  93 &scif2 {
  94         pinctrl-0 = <&scif2_pins>;
  95         pinctrl-names = "default";
  96
  97         status = "okay";
  98 };
  99
 100 &usb2_phy0 {
 101         pinctrl-0 = <&usb0_pins>;
 102         pinctrl-names = "default";
 103
 104         status = "okay";
 105 };
 106
 107 &pwm0 {
 108         pinctrl-0 = <&pwm0_pins>;
 109         pinctrl-names = "default";
 110
 111         status = "okay";
 112 };
 113
 114 &pwm1 {
 115         pinctrl-0 = <&pwm1_pins>;
 116         pinctrl-names = "default";
 117
 118         status = "okay";
 119 };
 120
 121 &rwdt {
 122         timeout-sec = <60>;
 123         status = "okay";
 124 };