]> git.ipfire.org Git - people/ms/u-boot.git/blob - arch/arm/dts/rk3399-puma.dtsi
arm64: ls2088ardb: Add distro secure boot support
[people/ms/u-boot.git] / arch / arm / dts / rk3399-puma.dtsi
1 /*
2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
3 *
4 * SPDX-License-Identifier: GPL-2.0+ X11
5 */
6
7 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399.dtsi"
9
10 / {
11 model = "Theobroma Systems RK3399-Q7 SoM";
12 compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399";
13
14 config {
15 u-boot,spl-payload-offset = <0x40000>; /* 256kbyte */
16 u-boot,boot-led = "module_led";
17 };
18
19 chosen {
20 stdout-path = "serial0:115200n8";
21 u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc;
22 };
23
24 aliases {
25 spi0 = &spi1;
26 spi1 = &spi5;
27 };
28
29 leds {
30 compatible = "gpio-leds";
31 pinctrl-names = "default";
32 pinctrl-0 = <&leds_pins_puma>;
33
34 module_led {
35 label = "module_led";
36 gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
37 linux,default-trigger = "heartbeat";
38 };
39
40 sd_card_led {
41 label = "sd_card_led";
42 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
43 linux,default-trigger = "mmc0";
44 };
45 };
46
47 clkin_gmac: external-gmac-clock {
48 compatible = "fixed-clock";
49 clock-frequency = <125000000>;
50 clock-output-names = "clkin_gmac";
51 #clock-cells = <0>;
52 };
53
54 dw_hdmi_audio: dw-hdmi-audio {
55 status = "enabled";
56 compatible = "rockchip,dw-hdmi-audio";
57 #sound-dai-cells = <0>;
58 };
59
60 hdmi_codec: hdmi-codec {
61 compatible = "simple-audio-card";
62 simple-audio-card,format = "i2s";
63 simple-audio-card,mclk-fs = <256>;
64 simple-audio-card,name = "HDMI-CODEC";
65
66 simple-audio-card,cpu {
67 sound-dai = <&i2s2>;
68 };
69
70 simple-audio-card,codec {
71 sound-dai = <&hdmi>;
72 };
73 };
74
75 hdmi_sound: hdmi-sound {
76 status = "disabled";
77 compatible = "simple-audio-card";
78 simple-audio-card,format = "i2s";
79 simple-audio-card,mclk-fs = <256>;
80 simple-audio-card,name = "rockchip,hdmi";
81
82 simple-audio-card,cpu {
83 sound-dai = <&i2s2>;
84 };
85 simple-audio-card,codec {
86 sound-dai = <&hdmi>;
87 };
88 };
89
90 vccadc_ref: vccadc-ref {
91 compatible = "regulator-fixed";
92 regulator-name = "vcc1v8_sys";
93 regulator-always-on;
94 regulator-boot-on;
95 regulator-min-microvolt = <1800000>;
96 regulator-max-microvolt = <1800000>;
97 };
98
99 vcc3v3_sys: vcc3v3-sys {
100 compatible = "regulator-fixed";
101 regulator-name = "vcc3v3_sys";
102 regulator-always-on;
103 regulator-boot-on;
104 regulator-min-microvolt = <3300000>;
105 regulator-max-microvolt = <3300000>;
106 };
107
108 vcc5v0_otg: vcc5v0-otg-regulator {
109 compatible = "regulator-fixed";
110 enable-active-high;
111 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&otg_vbus_drv>;
114 regulator-name = "vcc5v0_otg";
115 regulator-always-on;
116 };
117
118 vcc5v0_host: vcc5v0-host-regulator {
119 compatible = "regulator-fixed";
120 enable-active-low;
121 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
122 pinctrl-names = "default";
123 pinctrl-0 = <&host_vbus_drv>;
124 regulator-name = "vcc5v0_host";
125 regulator-always-on;
126 };
127
128 vcc5v0_sys: vcc5v0-sys {
129 compatible = "regulator-fixed";
130 regulator-name = "vcc5v0_sys";
131 regulator-always-on;
132 regulator-boot-on;
133 regulator-min-microvolt = <5000000>;
134 regulator-max-microvolt = <5000000>;
135 };
136
137 vcc_phy: vcc-phy-regulator {
138 compatible = "regulator-fixed";
139 regulator-name = "vcc_phy";
140 regulator-always-on;
141 regulator-boot-on;
142 };
143
144 vdd_log: vdd-log {
145 compatible = "pwm-regulator";
146 pwms = <&pwm2 0 25000 1>;
147 regulator-name = "vdd_log";
148 regulator-min-microvolt = <800000>;
149 regulator-max-microvolt = <1400000>;
150 regulator-always-on;
151 regulator-boot-on;
152
153 /* for rockchip boot on */
154 rockchip,pwm_id= <2>;
155 rockchip,pwm_voltage = <1000000>;
156 };
157 };
158
159 &emmc_phy {
160 status = "okay";
161 };
162
163 &gmac {
164 phy-supply = <&vcc_phy>;
165 phy-mode = "rgmii";
166 clock_in_out = "input";
167 snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
168 snps,reset-active-low;
169 snps,reset-delays-us = <2 10000 50000>;
170 assigned-clocks = <&cru SCLK_RMII_SRC>;
171 assigned-clock-parents = <&clkin_gmac>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&rgmii_pins>;
174 tx_delay = <0x10>;
175 rx_delay = <0x10>;
176 status = "okay";
177 };
178
179 &hdmi {
180 #address-cells = <1>;
181 #size-cells = <0>;
182 #sound-dai-cells = <0>;
183 status = "okay";
184 };
185
186 &i2c0 {
187 status = "okay";
188 i2c-scl-rising-time-ns = <168>;
189 i2c-scl-falling-time-ns = <4>;
190 clock-frequency = <400000>;
191
192 vdd_gpu: fan535555@60 {
193 compatible = "fcs,fan53555";
194 reg = <0x60>;
195 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
196 vin-supply = <&vcc5v0_sys>;
197 regulator-compatible = "fan53555-reg";
198 regulator-name = "vdd_gpu";
199 regulator-min-microvolt = <600000>;
200 regulator-max-microvolt = <1230000>;
201 regulator-ramp-delay = <1000>;
202 fcs,suspend-voltage-selector = <1>;
203 regulator-always-on;
204 regulator-boot-on;
205 regulator-initial-state = <3>;
206 regulator-state-mem {
207 regulator-off-in-suspend;
208 };
209 };
210
211 rk808: pmic@1b {
212 compatible = "rockchip,rk808";
213 reg = <0x1b>;
214 interrupt-parent = <&gpio1>;
215 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; // TODO check interrupt?
216 pinctrl-names = "default";
217 pinctrl-0 = <&pmic_int_l>;
218 rockchip,system-power-controller;
219 wakeup-source;
220 #clock-cells = <1>;
221 clock-output-names = "xin32k", "rk808-clkout2";
222
223 vcc1-supply = <&vcc5v0_sys>;
224 vcc2-supply = <&vcc5v0_sys>;
225 vcc3-supply = <&vcc5v0_sys>;
226 vcc4-supply = <&vcc5v0_sys>;
227 vcc6-supply = <&vcc5v0_sys>;
228 vcc7-supply = <&vcc5v0_sys>;
229 vcc8-supply = <&vcc3v3_sys>;
230 vcc9-supply = <&vcc5v0_sys>;
231 vcc10-supply = <&vcc5v0_sys>;
232 vcc11-supply = <&vcc5v0_sys>;
233 vcc12-supply = <&vcc3v3_sys>;
234 vddio-supply = <&vcc1v8_pmu>;
235
236 regulators {
237 vdd_center: DCDC_REG1 {
238 regulator-always-on;
239 regulator-boot-on;
240 regulator-min-microvolt = <750000>;
241 regulator-max-microvolt = <1350000>;
242 regulator-ramp-delay = <6001>;
243 regulator-name = "vdd_center";
244 regulator-state-mem {
245 regulator-off-in-suspend;
246 };
247 };
248
249 vdd_cpu_l: DCDC_REG2 {
250 regulator-always-on;
251 regulator-boot-on;
252 regulator-min-microvolt = <750000>;
253 regulator-max-microvolt = <1350000>;
254 regulator-ramp-delay = <6001>;
255 regulator-name = "vdd_cpu_l";
256 regulator-state-mem {
257 regulator-off-in-suspend;
258 };
259 };
260
261 vcc_ddr: DCDC_REG3 {
262 regulator-always-on;
263 regulator-boot-on;
264 regulator-name = "vcc_ddr";
265 regulator-state-mem {
266 regulator-on-in-suspend;
267 };
268 };
269
270 vcc_1v8: DCDC_REG4 {
271 regulator-always-on;
272 regulator-boot-on;
273 regulator-min-microvolt = <1800000>;
274 regulator-max-microvolt = <1800000>;
275 regulator-name = "vcc_1v8";
276 regulator-state-mem {
277 regulator-on-in-suspend;
278 regulator-suspend-microvolt = <1800000>;
279 };
280 };
281
282 vcc_ldo1: LDO_REG1 {
283 regulator-boot-on;
284 regulator-min-microvolt = <1800000>;
285 regulator-max-microvolt = <1800000>;
286 regulator-name = "vcc_ldo1";
287 regulator-state-mem {
288 regulator-off-in-suspend;
289 };
290 };
291
292 vcc1v8_hdmi: LDO_REG2 {
293 regulator-always-on;
294 regulator-boot-on;
295 regulator-min-microvolt = <1800000>;
296 regulator-max-microvolt = <1800000>;
297 regulator-name = "vcc1v8_hdmi";
298 regulator-state-mem {
299 regulator-off-in-suspend;
300 };
301 };
302
303 vcc1v8_pmu: LDO_REG3 {
304 regulator-always-on;
305 regulator-boot-on;
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <1800000>;
308 regulator-name = "vcc1v8_pmu";
309 regulator-state-mem {
310 regulator-on-in-suspend;
311 regulator-suspend-microvolt = <1800000>;
312 };
313 };
314
315 vcc_sd: LDO_REG4 {
316 regulator-always-on;
317 regulator-boot-on;
318 regulator-min-microvolt = <1800000>;
319 regulator-max-microvolt = <3300000>;
320 regulator-name = "vcc_sd";
321 regulator-state-mem {
322 regulator-on-in-suspend;
323 regulator-suspend-microvolt = <3300000>;
324 };
325 };
326
327 vcc_ldo5: LDO_REG5 {
328 regulator-boot-on;
329 regulator-min-microvolt = <3000000>;
330 regulator-max-microvolt = <3000000>;
331 regulator-name = "vcc_ldo5";
332 regulator-state-mem {
333 regulator-off-in-suspend;
334 };
335 };
336
337 vcc_ldo6: LDO_REG6 {
338 regulator-boot-on;
339 regulator-min-microvolt = <1500000>;
340 regulator-max-microvolt = <1500000>;
341 regulator-name = "vcc_ldo6";
342 regulator-state-mem {
343 regulator-off-in-suspend;
344 };
345 };
346
347 vcc0v9_hdmi: LDO_REG7 {
348 regulator-always-on;
349 regulator-boot-on;
350 regulator-min-microvolt = <900000>;
351 regulator-max-microvolt = <900000>;
352 regulator-name = "vcc0v9_hdmi";
353 regulator-state-mem {
354 regulator-off-in-suspend;
355 };
356 };
357
358 vcc_efuse: LDO_REG8 {
359 regulator-always-on;
360 regulator-boot-on;
361 regulator-min-microvolt = <1800000>;
362 regulator-max-microvolt = <1800000>;
363 regulator-name = "vcc_efuse";
364 regulator-state-mem {
365 regulator-off-in-suspend;
366 };
367 };
368
369 vcc3v3_s3: SWITCH_REG1 {
370 regulator-always-on;
371 regulator-boot-on;
372 regulator-name = "vcc3v3_s3";
373 regulator-state-mem {
374 regulator-off-in-suspend;
375 };
376 };
377
378 vcc3v3_s0: SWITCH_REG2 {
379 regulator-always-on;
380 regulator-boot-on;
381 regulator-name = "vcc3v3_s0";
382 regulator-state-mem {
383 regulator-off-in-suspend;
384 };
385 };
386 };
387 };
388 };
389
390 &i2c8 {
391 status = "okay";
392 clock-frequency = <400000>;
393
394 vdd_cpu_b: fan53555@60 {
395 compatible = "fcs,fan53555";
396 reg = <0x60>;
397 vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
398 vin-supply = <&vcc5v0_sys>;
399 regulator-compatible = "fan53555-reg";
400 regulator-name = "vdd_cpu_b";
401 regulator-min-microvolt = <600000>;
402 regulator-max-microvolt = <1230000>;
403 regulator-ramp-delay = <1000>;
404 fcs,suspend-voltage-selector = <1>;
405 regulator-always-on;
406 regulator-boot-on;
407 regulator-initial-state = <3>;
408 regulator-state-mem {
409 regulator-off-in-suspend;
410 };
411 };
412 };
413
414 &i2s0 {
415 status = "okay";
416 rockchip,i2s-broken-burst-len;
417 rockchip,playback-channels = <8>;
418 rockchip,capture-channels = <8>;
419 #sound-dai-cells = <0>;
420 };
421
422 &i2s2 {
423 #sound-dai-cells = <0>;
424 status = "okay";
425 };
426
427 &io_domains {
428 status = "okay";
429
430 bt656-supply = <&vcc_1v8>; /* bt656_gpio2ab_ms */
431 audio-supply = <&vcc_1v8>; /* audio_gpio3d4a_ms */
432 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
433 gpio1830-supply = <&vcc_1v8>; /* gpio1833_gpio4cd_ms */
434 };
435
436 &pcie0 {
437 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
438 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
439 assigned-clock-rates = <100000000>;
440 ep-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
441 num-lanes = <4>;
442 pinctrl-names = "default";
443 pinctrl-0 = <&pcie_clkreqn>;
444 status = "okay";
445 };
446
447 &pcie_phy {
448 status = "okay";
449 };
450
451 &pmu_io_domains {
452 status = "okay";
453 pmu1830-supply = <&vcc_1v8>;
454 };
455
456 &pwm0 {
457 status = "okay";
458 };
459
460 &pwm2 {
461 status = "okay";
462 };
463
464 &sdhci {
465 bus-width = <8>;
466 mmc-hs400-1_8v;
467 supports-emmc;
468 non-removable;
469 keep-power-in-suspend;
470 mmc-hs400-enhanced-strobe;
471 status = "okay";
472 };
473
474 &sdmmc {
475 u-boot,dm-pre-reloc;
476 clock-frequency = <150000000>;
477 clock-freq-min-max = <100000 150000000>;
478 supports-sd;
479 bus-width = <4>;
480 cap-mmc-highspeed;
481 cap-sd-highspeed;
482 disable-wp;
483 num-slots = <1>;
484 vqmmc-supply = <&vcc_sd>;
485 pinctrl-names = "default";
486 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
487 status = "okay";
488 };
489
490 &uart2 {
491 status = "okay";
492 };
493
494 &usb_host0_ehci {
495 status = "okay";
496 };
497
498 &usb_host0_ohci {
499 status = "okay";
500 };
501
502 &dwc3_typec0 {
503 status = "disabled";
504 };
505
506 &usb_host1_ehci {
507 status = "okay";
508 };
509
510 &usb_host1_ohci {
511 status = "okay";
512 };
513
514 &dwc3_typec1 {
515 rockchip,vbus-gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
516 status = "okay";
517 };
518
519 &vopb {
520 status = "okay";
521 };
522
523 &pinctrl {
524 /* Pins that are not explicitely used by any devices */
525 pinctrl-names = "default";
526 pinctrl-0 = <&puma_pin_hog>;
527 hog {
528 puma_pin_hog: puma_pin_hog {
529 rockchip,pins =
530 /* We need pull-ups on Q7 buttons */
531 <0 4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */
532 <0 10 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */
533 <0 11 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */
534 <0 9 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */
535 };
536 };
537
538 pmic {
539 pmic_int_l: pmic-int-l {
540 rockchip,pins =
541 <1 22 RK_FUNC_GPIO &pcfg_pull_up>;
542 };
543 };
544
545 leds_pins_puma: led_pins@0 {
546 rockchip,pins =
547 <2 25 RK_FUNC_GPIO &pcfg_pull_none>,
548 <1 2 RK_FUNC_GPIO &pcfg_pull_none>;
549 };
550
551 usb2 {
552 otg_vbus_drv: otg-vbus-drv {
553 rockchip,pins =
554 <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
555 };
556
557 host_vbus_drv: host-vbus-drv {
558 rockchip,pins =
559 <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
560 };
561 };
562
563 i2c8 {
564 i2c8_xfer_a: i2c8-xfer {
565 rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>,
566 <1 20 RK_FUNC_1 &pcfg_pull_up>;
567 };
568 };
569 };
570
571 &i2c1 {
572 status = "okay";
573 clock-frequency = <400000>;
574 };
575 &i2c2 {
576 status = "okay";
577 clock-frequency = <400000>;
578 };
579 &i2c4 {
580 status = "okay";
581 clock-frequency = <400000>;
582 };
583 &i2c6 {
584 status = "okay";
585 clock-frequency = <400000>;
586 };
587
588 &i2c6_xfer {
589 /* Enable pull-ups, the pins would float otherwise. */
590 rockchip,pins =
591 <2 10 RK_FUNC_2 &pcfg_pull_up>,
592 <2 9 RK_FUNC_2 &pcfg_pull_up>;
593 };
594
595 &i2c7 {
596 status = "okay";
597 clock-frequency = <400000>;
598
599 rtc_twi: rtc@6f {
600 compatible = "isil,isl1208";
601 reg = <0x6f>;
602 };
603 fan: fan@18 {
604 compatible = "ti,amc6821";
605 reg = <0x18>;
606 cooling-min-state = <0>;
607 cooling-max-state = <9>;
608 #cooling-cells = <2>;
609 };
610 };
611
612 &uart0 {
613 u-boot,dm-pre-reloc;
614 pinctrl-names = "default";
615 pinctrl-0 = <&uart0_xfer &uart0_cts>;
616 status = "okay";
617 };
618
619
620 &spi1 {
621 u-boot,dm-pre-reloc;
622
623 status = "okay";
624
625 #address-cells = <1>;
626 #size-cells = <0>;
627
628 spiflash: w25q32dw@0 {
629 u-boot,dm-pre-reloc;
630
631 compatible = "spi-flash";
632 reg = <0>;
633 spi-max-frequency = <49500000>;
634 spi-cpol;
635 spi-cpha;
636 };
637 };
638
639 &spi5 {
640 status = "okay";
641 };
642