arch/arm/dts/stv0991.dts

   1 /dts-v1/;
   2
   3 / {
   4         model = "ST STV0991 application board";
   5         compatible = "st,stv0991";
   6         #address-cells = <1>;
   7         #size-cells = <1>;
   8
   9         chosen {
  10                 stdout-path = &uart0;
  11         };
  12
  13         memory {
  14                 device_type="memory";
  15                 reg = <0x0 0x198000>;
  16         };
  17
  18         uart0: serial@0x80406000 {
  19                 compatible = "arm,pl011", "arm,primecell";
  20                 reg = <0x80406000 0x1000>;
  21                 clock = <2700000>;
  22         };
  23
  24         aliases {
  25                 spi0 = "/spi@80203000";         /* QSPI */
  26         };
  27
  28         qspi: spi@80203000 {
  29                         compatible = "cadence,qspi";
  30                         #address-cells = <1>;
  31                         #size-cells = <0>;
  32                         reg = <0x80203000 0x100>,
  33                                 <0x40000000 0x1000000>;
  34                         clocks = <3750000>;
  35                         sram-size = <256>;
  36                         status = "okay";
  37
  38                         flash0: n25q32@0 {
  39                                 #address-cells = <1>;
  40                                 #size-cells = <1>;
  41                                 compatible = "spi-flash";
  42                                 reg = <0>;              /* chip select */
  43                                 spi-max-frequency = <50000000>;
  44                                 m25p,fast-read;
  45                                 page-size = <256>;
  46                                 block-size = <16>;      /* 2^16, 64KB */
  47                                 tshsl-ns = <50>;
  48                                 tsd2d-ns = <50>;
  49                                 tchsh-ns = <4>;
  50                                 tslch-ns = <4>;
  51                         };
  52         };
  53 };