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1 /*
2 * (C) Copyright 2007
3 * Sascha Hauer, Pengutronix
4 *
5 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #include <common.h>
27 #include <asm/io.h>
28 #include <div64.h>
29 #include <asm/arch/imx-regs.h>
30 #include <asm/arch/clock.h>
31
32 /* General purpose timers registers */
33 struct mxc_gpt {
34 unsigned int control;
35 unsigned int prescaler;
36 unsigned int status;
37 unsigned int nouse[6];
38 unsigned int counter;
39 };
40
41 static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
42
43 /* General purpose timers bitfields */
44 #define GPTCR_SWR (1 << 15) /* Software reset */
45 #define GPTCR_FRR (1 << 9) /* Freerun / restart */
46 #define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
47 #define GPTCR_TEN 1 /* Timer enable */
48
49 DECLARE_GLOBAL_DATA_PTR;
50
51 static inline unsigned long long tick_to_time(unsigned long long tick)
52 {
53 tick *= CONFIG_SYS_HZ;
54 do_div(tick, MXC_CLK32);
55
56 return tick;
57 }
58
59 static inline unsigned long long us_to_tick(unsigned long long usec)
60 {
61 usec = usec * MXC_CLK32 + 999999;
62 do_div(usec, 1000000);
63
64 return usec;
65 }
66
67 int timer_init(void)
68 {
69 int i;
70
71 /* setup GP Timer 1 */
72 __raw_writel(GPTCR_SWR, &cur_gpt->control);
73
74 /* We have no udelay by now */
75 for (i = 0; i < 100; i++)
76 __raw_writel(0, &cur_gpt->control);
77
78 __raw_writel(0, &cur_gpt->prescaler); /* 32Khz */
79
80 /* Freerun Mode, PERCLK1 input */
81 i = __raw_readl(&cur_gpt->control);
82 __raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
83
84 gd->arch.tbl = __raw_readl(&cur_gpt->counter);
85 gd->arch.tbu = 0;
86
87 return 0;
88 }
89
90 unsigned long long get_ticks(void)
91 {
92 ulong now = __raw_readl(&cur_gpt->counter); /* current tick value */
93
94 /* increment tbu if tbl has rolled over */
95 if (now < gd->arch.tbl)
96 gd->arch.tbu++;
97 gd->arch.tbl = now;
98 return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
99 }
100
101 ulong get_timer_masked(void)
102 {
103 /*
104 * get_ticks() returns a long long (64 bit), it wraps in
105 * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
106 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
107 * 5 * 10^6 days - long enough.
108 */
109 return tick_to_time(get_ticks());
110 }
111
112 ulong get_timer(ulong base)
113 {
114 return get_timer_masked() - base;
115 }
116
117 /* delay x useconds AND preserve advance timstamp value */
118 void __udelay(unsigned long usec)
119 {
120 unsigned long long tmp;
121 ulong tmo;
122
123 tmo = us_to_tick(usec);
124 tmp = get_ticks() + tmo; /* get current timestamp */
125
126 while (get_ticks() < tmp) /* loop till event */
127 /*NOP*/;
128 }
129
130 /*
131 * This function is derived from PowerPC code (timebase clock frequency).
132 * On ARM it returns the number of timer ticks per second.
133 */
134 ulong get_tbclk(void)
135 {
136 return MXC_CLK32;
137 }