arch/arm/include/asm/arch-am33xx/clock.h

   1 /*
   2  * clock.h
   3  *
   4  * clock header
   5  *
   6  * Copyright (C) 2011, Texas Instruments Incorporated - http://www.ti.com/
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef _CLOCKS_H_
  12 #define _CLOCKS_H_
  13
  14 #include <asm/arch/clocks_am33xx.h>
  15
  16 #ifdef CONFIG_TI81XX
  17 #include <asm/arch/clock_ti81xx.h>
  18 #endif
  19
  20 #define LDELAY 1000000
  21
  22 /*CM_<clock_domain>__CLKCTRL */
  23 #define CD_CLKCTRL_CLKTRCTRL_SHIFT              0
  24 #define CD_CLKCTRL_CLKTRCTRL_MASK               3
  25
  26 #define CD_CLKCTRL_CLKTRCTRL_NO_SLEEP           0
  27 #define CD_CLKCTRL_CLKTRCTRL_SW_SLEEP           1
  28 #define CD_CLKCTRL_CLKTRCTRL_SW_WKUP            2
  29
  30 /* CM_<clock_domain>_<module>_CLKCTRL */
  31 #define MODULE_CLKCTRL_MODULEMODE_SHIFT         0
  32 #define MODULE_CLKCTRL_MODULEMODE_MASK          3
  33 #define MODULE_CLKCTRL_IDLEST_SHIFT             16
  34 #define MODULE_CLKCTRL_IDLEST_MASK              (3 << 16)
  35
  36 #define MODULE_CLKCTRL_MODULEMODE_SW_DISABLE            0
  37 #define MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN        2
  38
  39 #define MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL  0
  40 #define MODULE_CLKCTRL_IDLEST_TRANSITIONING     1
  41 #define MODULE_CLKCTRL_IDLEST_IDLE              2
  42 #define MODULE_CLKCTRL_IDLEST_DISABLED          3
  43
  44 /* CM_CLKMODE_DPLL */
  45 #define CM_CLKMODE_DPLL_SSC_EN_SHIFT            12
  46 #define CM_CLKMODE_DPLL_SSC_EN_MASK             (1 << 12)
  47 #define CM_CLKMODE_DPLL_REGM4XEN_SHIFT          11
  48 #define CM_CLKMODE_DPLL_REGM4XEN_MASK           (1 << 11)
  49 #define CM_CLKMODE_DPLL_LPMODE_EN_SHIFT         10
  50 #define CM_CLKMODE_DPLL_LPMODE_EN_MASK          (1 << 10)
  51 #define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_SHIFT    9
  52 #define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK     (1 << 9)
  53 #define CM_CLKMODE_DPLL_DRIFTGUARD_EN_SHIFT     8
  54 #define CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK      (1 << 8)
  55 #define CM_CLKMODE_DPLL_RAMP_RATE_SHIFT         5
  56 #define CM_CLKMODE_DPLL_RAMP_RATE_MASK          (0x7 << 5)
  57 #define CM_CLKMODE_DPLL_EN_SHIFT                0
  58 #define CM_CLKMODE_DPLL_EN_MASK                 (0x7 << 0)
  59
  60 #define CM_CLKMODE_DPLL_DPLL_EN_SHIFT           0
  61 #define CM_CLKMODE_DPLL_DPLL_EN_MASK            7
  62
  63 #define DPLL_EN_STOP                    1
  64 #define DPLL_EN_MN_BYPASS               4
  65 #define DPLL_EN_LOW_POWER_BYPASS        5
  66 #define DPLL_EN_LOCK                    7
  67
  68 /* CM_IDLEST_DPLL fields */
  69 #define ST_DPLL_CLK_MASK                1
  70
  71 /* CM_CLKSEL_DPLL */
  72 #define CM_CLKSEL_DPLL_M_SHIFT                  8
  73 #define CM_CLKSEL_DPLL_M_MASK                   (0x7FF << 8)
  74 #define CM_CLKSEL_DPLL_N_SHIFT                  0
  75 #define CM_CLKSEL_DPLL_N_MASK                   0x7F
  76
  77 struct dpll_params {
  78         u32 m;
  79         u32 n;
  80         s8 m2;
  81         s8 m3;
  82         s8 m4;
  83         s8 m5;
  84         s8 m6;
  85 };
  86
  87 struct dpll_regs {
  88         u32 cm_clkmode_dpll;
  89         u32 cm_idlest_dpll;
  90         u32 cm_autoidle_dpll;
  91         u32 cm_clksel_dpll;
  92         u32 cm_div_m2_dpll;
  93         u32 cm_div_m3_dpll;
  94         u32 cm_div_m4_dpll;
  95         u32 cm_div_m5_dpll;
  96         u32 cm_div_m6_dpll;
  97 };
  98
  99 extern const struct dpll_regs dpll_mpu_regs;
 100 extern const struct dpll_regs dpll_core_regs;
 101 extern const struct dpll_regs dpll_per_regs;
 102 extern const struct dpll_regs dpll_ddr_regs;
 103
 104 extern struct cm_wkuppll *const cmwkup;
 105
 106 const struct dpll_params *get_dpll_mpu_params(void);
 107 const struct dpll_params *get_dpll_core_params(void);
 108 const struct dpll_params *get_dpll_per_params(void);
 109 const struct dpll_params *get_dpll_ddr_params(void);
 110 void do_setup_dpll(const struct dpll_regs *, const struct dpll_params *);
 111 void prcm_init(void);
 112 void enable_basic_clocks(void);
 113 void do_enable_clocks(u32 *const *, u32 *const *, u8);
 114
 115 #endif