arch/arm/include/asm/arch-davinci/psc_defs.h

   1 /*
   2  * Copyright (C) 2011
   3  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7 #ifndef _DV_PSC_DEFS_H_
   8 #define _DV_PSC_DEFS_H_
   9
  10 /*
  11  * Power/Sleep Ctrl Register structure
  12  * See sprufb3.pdf, Chapter 7
  13  */
  14 struct dv_psc_regs {
  15         unsigned int    pid;            /* 0x000 */
  16         unsigned char   rsvd0[16];      /* 0x004 */
  17         unsigned char   rsvd1[4];       /* 0x014 */
  18         unsigned int    inteval;        /* 0x018 */
  19         unsigned char   rsvd2[36];      /* 0x01C */
  20         unsigned int    merrpr0;        /* 0x040 */
  21         unsigned int    merrpr1;        /* 0x044 */
  22         unsigned char   rsvd3[8];       /* 0x048 */
  23         unsigned int    merrcr0;        /* 0x050 */
  24         unsigned int    merrcr1;        /* 0x054 */
  25         unsigned char   rsvd4[8];       /* 0x058 */
  26         unsigned int    perrpr;         /* 0x060 */
  27         unsigned char   rsvd5[4];       /* 0x064 */
  28         unsigned int    perrcr;         /* 0x068 */
  29         unsigned char   rsvd6[4];       /* 0x06C */
  30         unsigned int    epcpr;          /* 0x070 */
  31         unsigned char   rsvd7[4];       /* 0x074 */
  32         unsigned int    epccr;          /* 0x078 */
  33         unsigned char   rsvd8[144];     /* 0x07C */
  34         unsigned char   rsvd9[20];      /* 0x10C */
  35         unsigned int    ptcmd;          /* 0x120 */
  36         unsigned char   rsvd10[4];      /* 0x124 */
  37         unsigned int    ptstat;         /* 0x128 */
  38         unsigned char   rsvd11[212];    /* 0x12C */
  39         unsigned int    pdstat0;        /* 0x200 */
  40         unsigned int    pdstat1;        /* 0x204 */
  41         unsigned char   rsvd12[248];    /* 0x208 */
  42         unsigned int    pdctl0;         /* 0x300 */
  43         unsigned int    pdctl1;         /* 0x304 */
  44         unsigned char   rsvd13[536];    /* 0x308 */
  45         unsigned int    mckout0;        /* 0x520 */
  46         unsigned int    mckout1;        /* 0x524 */
  47         unsigned char   rsvd14[728];    /* 0x528 */
  48         unsigned int    mdstat[52];     /* 0x800 */
  49         unsigned char   rsvd15[304];    /* 0x8D0 */
  50         unsigned int    mdctl[52];      /* 0xA00 */
  51 };
  52
  53 /* PSC constants */
  54 #define EMURSTIE_MASK   (0x00000200)
  55
  56 #define PD0             (0)
  57
  58 #define PSC_ENABLE              (0x3)
  59 #define PSC_DISABLE             (0x2)
  60 #define PSC_SYNCRESET           (0x1)
  61 #define PSC_SWRSTDISABLE        (0x0)
  62
  63 #define PSC_GOSTAT              (1 << 0)
  64 #define PSC_MD_STATE_MSK        (0x1f)
  65
  66 #define PSC_CMD_GO              (1 << 0)
  67
  68 #define dv_psc_regs ((struct dv_psc_regs *)DAVINCI_PWR_SLEEP_CNTRL_BASE)
  69
  70 #endif /* _DV_PSC_DEFS_H_ */