arch/arm/include/asm/arch-omap24xx/mux.h

   1 /*
   2  * (C) Copyright 2004
   3  * Texas Instruments, <www.ti.com>
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21 #ifndef _OMAP2420_MUX_H_
  22 #define _OMAP2420_MUX_H_
  23
  24 #ifndef __ASSEMBLY__
  25 typedef  unsigned char uint8;
  26 typedef  unsigned int uint32;
  27
  28 void muxSetupSDRC(void);
  29 void muxSetupGPMC(void);
  30 void muxSetupUsb0(void);
  31 void muxSetupUsbHost(void);
  32 void muxSetupUart3(void);
  33 void muxSetupI2C1(void);
  34 void muxSetupUART1(void);
  35 void muxSetupLCD(void);
  36 void muxSetupCamera(void);
  37 void muxSetupMMCSD(void) ;
  38 void muxSetupTouchScreen(void) ;
  39 void muxSetupHDQ(void);
  40 #endif
  41
  42 #define USB_OTG_CTRL                            ((volatile uint32 *)0x4805E30C)
  43
  44 /* Pin Muxing registers used for HDQ (Smart battery) */
  45 #define CONTROL_PADCONF_HDQ_SIO         ((volatile unsigned char *)0x48000115)
  46
  47 /* Pin Muxing registers used for GPMC */
  48 #define CONTROL_PADCONF_GPMC_D2_BYTE0   ((volatile unsigned char *)0x48000088)
  49 #define CONTROL_PADCONF_GPMC_D2_BYTE1   ((volatile unsigned char *)0x48000089)
  50 #define CONTROL_PADCONF_GPMC_D2_BYTE2   ((volatile unsigned char *)0x4800008A)
  51 #define CONTROL_PADCONF_GPMC_D2_BYTE3   ((volatile unsigned char *)0x4800008B)
  52
  53 #define CONTROL_PADCONF_GPMC_NCS0_BYTE0 ((volatile unsigned char *)0x4800008C)
  54 #define CONTROL_PADCONF_GPMC_NCS0_BYTE1 ((volatile unsigned char *)0x4800008D)
  55 #define CONTROL_PADCONF_GPMC_NCS0_BYTE2 ((volatile unsigned char *)0x4800008E)
  56 #define CONTROL_PADCONF_GPMC_NCS0_BYTE3 ((volatile unsigned char *)0x4800008F)
  57 #define CONTROL_PADCONF_GPMC_NCS0_BYTE4 (0x48000090)
  58 #define CONTROL_PADCONF_GPMC_NCS0_BYTE5 (0x48000091)
  59 #define CONTROL_PADCONF_GPMC_NCS0_BYTE6 (0x48000092)
  60 #define CONTROL_PADCONF_GPMC_NCS0_BYTE7 (0x48000093)
  61
  62 /* Pin Muxing registers used for SDRC */
  63 #define CONTROL_PADCONF_SDRC_NCS0_BYTE0 ((volatile unsigned char *)0x480000A0)
  64 #define CONTROL_PADCONF_SDRC_NCS0_BYTE1 ((volatile unsigned char *)0x480000A1)
  65 #define CONTROL_PADCONF_SDRC_NCS0_BYTE2 ((volatile unsigned char *)0x480000A2)
  66 #define CONTROL_PADCONF_SDRC_NCS0_BYTE3 ((volatile unsigned char *)0x480000A3)
  67
  68 #define CONTROL_PADCONF_SDRC_A14_BYTE0  ((volatile unsigned char *)0x48000030)
  69 #define CONTROL_PADCONF_SDRC_A14_BYTE1  ((volatile unsigned char *)0x48000031)
  70 #define CONTROL_PADCONF_SDRC_A14_BYTE2  ((volatile unsigned char *)0x48000032)
  71 #define CONTROL_PADCONF_SDRC_A14_BYTE3  ((volatile unsigned char *)0x48000033)
  72
  73 /* Pin Muxing registers used for Touch Screen (SPI) */
  74 #define CONTROL_PADCONF_SPI1_CLK        ((volatile unsigned char *)0x480000FF)
  75 #define CONTROL_PADCONF_SPI1_SIMO       ((volatile unsigned char *)0x48000100)
  76 #define CONTROL_PADCONF_SPI1_SOMI       ((volatile unsigned char *)0x48000101)
  77 #define CONTROL_PADCONF_SPI1_NCS0       ((volatile unsigned char *)0x48000102)
  78 #define CONTROL_PADCONF_SPI1_NCS1       (0x48000103)
  79
  80 #define CONTROL_PADCONF_MCBSP1_FSR      ((volatile unsigned char *)0x4800010B)
  81
  82 /* Pin Muxing registers used for MMCSD */
  83 #define CONTROL_PADCONF_MMC_CLKI        ((volatile unsigned char *)0x480000FE)
  84 #define CONTROL_PADCONF_MMC_CLKO        ((volatile unsigned char *)0x480000F3)
  85 #define CONTROL_PADCONF_MMC_CMD         ((volatile unsigned char *)0x480000F4)
  86 #define CONTROL_PADCONF_MMC_DAT0        ((volatile unsigned char *)0x480000F5)
  87 #define CONTROL_PADCONF_MMC_DAT1        ((volatile unsigned char *)0x480000F6)
  88 #define CONTROL_PADCONF_MMC_DAT2        ((volatile unsigned char *)0x480000F7)
  89 #define CONTROL_PADCONF_MMC_DAT3        ((volatile unsigned char *)0x480000F8)
  90 #define CONTROL_PADCONF_MMC_DAT_DIR0    ((volatile unsigned char *)0x480000F9)
  91 #define CONTROL_PADCONF_MMC_DAT_DIR1    ((volatile unsigned char *)0x480000FA)
  92 #define CONTROL_PADCONF_MMC_DAT_DIR2    ((volatile unsigned char *)0x480000FB)
  93 #define CONTROL_PADCONF_MMC_DAT_DIR3    ((volatile unsigned char *)0x480000FC)
  94 #define CONTROL_PADCONF_MMC_CMD_DIR     ((volatile unsigned char *)0x480000FD)
  95
  96 #define CONTROL_PADCONF_SDRC_A14        ((volatile unsigned char *)0x48000030)
  97 #define CONTROL_PADCONF_SDRC_A13        ((volatile unsigned char *)0x48000031)
  98
  99 /* Pin Muxing registers used for CAMERA */
 100 #define CONTROL_PADCONF_SYS_NRESWARM    ((volatile unsigned char *)0x4800012B)
 101
 102 #define CONTROL_PADCONF_CAM_XCLK        ((volatile unsigned char *)0x480000DC)
 103 #define CONTROL_PADCONF_CAM_LCLK        ((volatile unsigned char *)0x480000DB)
 104 #define CONTROL_PADCONF_CAM_VS          ((volatile unsigned char *)0x480000DA)
 105 #define CONTROL_PADCONF_CAM_HS          ((volatile unsigned char *)0x480000D9)
 106 #define CONTROL_PADCONF_CAM_D0          ((volatile unsigned char *)0x480000D8)
 107 #define CONTROL_PADCONF_CAM_D1          ((volatile unsigned char *)0x480000D7)
 108 #define CONTROL_PADCONF_CAM_D2          ((volatile unsigned char *)0x480000D6)
 109 #define CONTROL_PADCONF_CAM_D3          ((volatile unsigned char *)0x480000D5)
 110 #define CONTROL_PADCONF_CAM_D4          ((volatile unsigned char *)0x480000D4)
 111 #define CONTROL_PADCONF_CAM_D5          ((volatile unsigned char *)0x480000D3)
 112 #define CONTROL_PADCONF_CAM_D6          ((volatile unsigned char *)0x480000D2)
 113 #define CONTROL_PADCONF_CAM_D7          ((volatile unsigned char *)0x480000D1)
 114 #define CONTROL_PADCONF_CAM_D8          ((volatile unsigned char *)0x480000D0)
 115 #define CONTROL_PADCONF_CAM_D9          ((volatile unsigned char *)0x480000CF)
 116
 117 /* Pin Muxing registers used for LCD */
 118 #define CONTROL_PADCONF_DSS_D0          ((volatile unsigned char *)0x480000B3)
 119 #define CONTROL_PADCONF_DSS_D1          ((volatile unsigned char *)0x480000B4)
 120 #define CONTROL_PADCONF_DSS_D2          ((volatile unsigned char *)0x480000B5)
 121 #define CONTROL_PADCONF_DSS_D3          ((volatile unsigned char *)0x480000B6)
 122 #define CONTROL_PADCONF_DSS_D4          ((volatile unsigned char *)0x480000B7)
 123 #define CONTROL_PADCONF_DSS_D5          ((volatile unsigned char *)0x480000B8)
 124 #define CONTROL_PADCONF_DSS_D6          ((volatile unsigned char *)0x480000B9)
 125 #define CONTROL_PADCONF_DSS_D7          ((volatile unsigned char *)0x480000BA)
 126 #define CONTROL_PADCONF_DSS_D8          ((volatile unsigned char *)0x480000BB)
 127 #define CONTROL_PADCONF_DSS_D9          ((volatile unsigned char *)0x480000BC)
 128 #define CONTROL_PADCONF_DSS_D10         ((volatile unsigned char *)0x480000BD)
 129 #define CONTROL_PADCONF_DSS_D11         ((volatile unsigned char *)0x480000BE)
 130 #define CONTROL_PADCONF_DSS_D12         ((volatile unsigned char *)0x480000BF)
 131 #define CONTROL_PADCONF_DSS_D13         ((volatile unsigned char *)0x480000C0)
 132 #define CONTROL_PADCONF_DSS_D14         ((volatile unsigned char *)0x480000C1)
 133 #define CONTROL_PADCONF_DSS_D15         ((volatile unsigned char *)0x480000C2)
 134 #define CONTROL_PADCONF_DSS_D16         ((volatile unsigned char *)0x480000C3)
 135 #define CONTROL_PADCONF_DSS_D17         ((volatile unsigned char *)0x480000C4)
 136 #define CONTROL_PADCONF_DSS_PCLK        ((volatile unsigned char *)0x480000CB)
 137 #define CONTROL_PADCONF_DSS_VSYNC       ((volatile unsigned char *)0x480000CC)
 138 #define CONTROL_PADCONF_DSS_HSYNC       ((volatile unsigned char *)0x480000CD)
 139 #define CONTROL_PADCONF_DSS_ACBIAS      ((volatile unsigned char *)0x480000CE)
 140
 141 /* Pin Muxing registers used for UART1 */
 142 #define CONTROL_PADCONF_UART1_CTS       ((volatile unsigned char *)0x480000C5)
 143 #define CONTROL_PADCONF_UART1_RTS       ((volatile unsigned char *)0x480000C6)
 144 #define CONTROL_PADCONF_UART1_TX        ((volatile unsigned char *)0x480000C7)
 145 #define CONTROL_PADCONF_UART1_RX        ((volatile unsigned char *)0x480000C8)
 146
 147 /* Pin Muxing registers used for I2C1 */
 148 #define CONTROL_PADCONF_I2C1_SCL        ((volatile unsigned char *)0x48000111)
 149 #define CONTROL_PADCONF_I2C1_SDA        ((volatile unsigned char *)0x48000112)
 150
 151 /* Pin Muxing registres used for USB0. */
 152 #define CONTROL_PADCONF_USB0_PUEN               ((volatile uint8 *)0x4800011D)
 153 #define CONTROL_PADCONF_USB0_VP                 ((volatile uint8 *)0x4800011E)
 154 #define CONTROL_PADCONF_USB0_VM                 ((volatile uint8 *)0x4800011F)
 155 #define CONTROL_PADCONF_USB0_RCV                ((volatile uint8 *)0x48000120)
 156 #define CONTROL_PADCONF_USB0_TXEN               ((volatile uint8 *)0x48000121)
 157 #define CONTROL_PADCONF_USB0_SE0                ((volatile uint8 *)0x48000122)
 158 #define CONTROL_PADCONF_USB0_DAT                ((volatile uint8 *)0x48000123)
 159
 160 /* Pin Muxing registres used for USB1. */
 161 #define CONTROL_PADCONF_USB1_RCV        (0x480000EB)
 162 #define CONTROL_PADCONF_USB1_TXEN       (0x480000EC)
 163
 164 /* Pin Muxing registers used for UART3/IRDA */
 165 #define CONTROL_PADCONF_UART3_TX_IRTX   ((volatile uint8 *)0x48000118)
 166 #define CONTROL_PADCONF_UART3_RX_IRRX   ((volatile uint8 *)0x48000119)
 167
 168 /* Pin Muxing registers used for GPIO */
 169 #define CONTROL_PADCONF_GPIO69          (0x480000ED)
 170 #define CONTROL_PADCONF_GPIO70          (0x480000EE)
 171 #define CONTROL_PADCONF_GPIO102         (0x48000116)
 172 #define CONTROL_PADCONF_GPIO103         (0x48000117)
 173 #define CONTROL_PADCONF_GPIO104         (0x48000118)
 174 #define CONTROL_PADCONF_GPIO105         (0x48000119)
 175
 176 #endif