arch/arm/include/asm/arch-rockchip/boot0.h

   1 /*
   2  * Copyright 2017 Theobroma Systems Design und Consulting GmbH
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /*
   8  * Execution starts on the instruction following this 4-byte header
   9  * (containing the magic 'RK30', 'RK31', 'RK32' or 'RK33').  This
  10  * magic constant will be written into the final image by the rkimage
  11  * tool, but we need to reserve space for it here.
  12  *
  13  * To make life easier for everyone, we build the SPL binary with
  14  * space for this 4-byte header already included in the binary.
  15  */
  16 #ifdef CONFIG_SPL_BUILD
  17         /*
  18          * We need to add 4 bytes of space for the 'RK33' at the
  19          * beginning of the executable.  However, as we want to keep
  20          * this generic and make it applicable to builds that are like
  21          * the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no
  22          * TPL, but extra space needed in the SPL), we simply repeat
  23          * the 'b reset' with the expectation that the first one will
  24          * be overwritten, if this is the first stage contained in the
  25          * final image created with mkimage)...
  26          */
  27         b reset  /* may be overwritten --- should be 'nop' or a 'b reset' */
  28 #endif
  29         b reset
  30 #if !defined(CONFIG_ARM64)
  31         /*
  32          * For armv7, the addr '_start' will used as vector start address
  33          * and write to VBAR register, which needs to aligned to 0x20.
  34          */
  35         .align(5)
  36 _start:
  37         ARM_VECTORS
  38 #endif
  39
  40 #if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
  41         .space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
  42 #endif