arch/arm/include/asm/arch-s3c24x0/s3c2440.h

   1 /*
   2  * (C) Copyright 2003
   3  * David Mueller ELSOFT AG Switzerland. d.mueller@elsoft.ch
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /************************************************
  25  * NAME     : s3c2440.h
  26  * Version  : 31.3.2003
  27  *
  28  * Based on S3C2440 User's manual Rev x.x
  29  ************************************************/
  30
  31 #ifndef __S3C2440_H__
  32 #define __S3C2440_H__
  33
  34 #define S3C24X0_UART_CHANNELS   3
  35 #define S3C24X0_SPI_CHANNELS    2
  36
  37 /* S3C2440 only supports 512 Byte HW ECC */
  38 #define S3C2440_ECCSIZE         512
  39 #define S3C2440_ECCBYTES        3
  40
  41 enum s3c24x0_uarts_nr {
  42         S3C24X0_UART0,
  43         S3C24X0_UART1,
  44         S3C24X0_UART2
  45 };
  46
  47 /* S3C2440 device base addresses */
  48 #define S3C24X0_MEMCTL_BASE             0x48000000
  49 #define S3C24X0_USB_HOST_BASE           0x49000000
  50 #define S3C24X0_INTERRUPT_BASE          0x4A000000
  51 #define S3C24X0_DMA_BASE                0x4B000000
  52 #define S3C24X0_CLOCK_POWER_BASE        0x4C000000
  53 #define S3C24X0_LCD_BASE                0x4D000000
  54 #define S3C2440_NAND_BASE               0x4E000000
  55 #define S3C24X0_UART_BASE               0x50000000
  56 #define S3C24X0_TIMER_BASE              0x51000000
  57 #define S3C24X0_USB_DEVICE_BASE         0x52000140
  58 #define S3C24X0_WATCHDOG_BASE           0x53000000
  59 #define S3C24X0_I2C_BASE                0x54000000
  60 #define S3C24X0_I2S_BASE                0x55000000
  61 #define S3C24X0_GPIO_BASE               0x56000000
  62 #define S3C24X0_RTC_BASE                0x57000000
  63 #define S3C2440_ADC_BASE                0x58000000
  64 #define S3C24X0_SPI_BASE                0x59000000
  65 #define S3C2440_SDI_BASE                0x5A000000
  66
  67 /* include common stuff */
  68 #include <asm/arch/s3c24x0.h>
  69
  70 static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void)
  71 {
  72         return (struct s3c24x0_memctl *)S3C24X0_MEMCTL_BASE;
  73 }
  74
  75 static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void)
  76 {
  77         return (struct s3c24x0_usb_host *)S3C24X0_USB_HOST_BASE;
  78 }
  79
  80 static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void)
  81 {
  82         return (struct s3c24x0_interrupt *)S3C24X0_INTERRUPT_BASE;
  83 }
  84
  85 static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void)
  86 {
  87         return (struct s3c24x0_dmas *)S3C24X0_DMA_BASE;
  88 }
  89
  90 static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void)
  91 {
  92         return (struct s3c24x0_clock_power *)S3C24X0_CLOCK_POWER_BASE;
  93 }
  94
  95 static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void)
  96 {
  97         return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE;
  98 }
  99
 100 static inline struct s3c2440_nand *s3c2440_get_base_nand(void)
 101 {
 102         return (struct s3c2440_nand *)S3C2440_NAND_BASE;
 103 }
 104
 105 static inline struct s3c24x0_uart
 106         *s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n)
 107 {
 108         return (struct s3c24x0_uart *)(S3C24X0_UART_BASE + (n * 0x4000));
 109 }
 110
 111 static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void)
 112 {
 113         return (struct s3c24x0_timers *)S3C24X0_TIMER_BASE;
 114 }
 115
 116 static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void)
 117 {
 118         return (struct s3c24x0_usb_device *)S3C24X0_USB_DEVICE_BASE;
 119 }
 120
 121 static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void)
 122 {
 123         return (struct s3c24x0_watchdog *)S3C24X0_WATCHDOG_BASE;
 124 }
 125
 126 static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void)
 127 {
 128         return (struct s3c24x0_i2c *)S3C24X0_I2C_BASE;
 129 }
 130
 131 static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void)
 132 {
 133         return (struct s3c24x0_i2s *)S3C24X0_I2S_BASE;
 134 }
 135
 136 static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void)
 137 {
 138         return (struct s3c24x0_gpio *)S3C24X0_GPIO_BASE;
 139 }
 140
 141 static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void)
 142 {
 143         return (struct s3c24x0_rtc *)S3C24X0_RTC_BASE;
 144 }
 145
 146 static inline struct s3c2440_adc *s3c2440_get_base_adc(void)
 147 {
 148         return (struct s3c2440_adc *)S3C2440_ADC_BASE;
 149 }
 150
 151 static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void)
 152 {
 153         return (struct s3c24x0_spi *)S3C24X0_SPI_BASE;
 154 }
 155
 156 static inline struct s3c2440_sdi *s3c2440_get_base_sdi(void)
 157 {
 158         return (struct s3c2440_sdi *)S3C2440_SDI_BASE;
 159 }
 160
 161 #endif /*__S3C2440_H__*/