arch/arm/include/asm/arch-vf610/iomux-vf610.h

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __IOMUX_VF610_H__
   8 #define __IOMUX_VF610_H__
   9
  10 #include <asm/imx-common/iomux-v3.h>
  11
  12 /* Pad control groupings */
  13 #define VF610_UART_PAD_CTRL     (PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_25ohm | \
  14                                 PAD_CTL_OBE_IBE_ENABLE)
  15 #define VF610_SDHC_PAD_CTRL     (PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_20ohm | \
  16                                 PAD_CTL_OBE_IBE_ENABLE)
  17 #define VF610_ENET_PAD_CTRL     (PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_50ohm | \
  18                                 PAD_CTL_OBE_IBE_ENABLE)
  19 #define VF610_DDR_PAD_CTRL      PAD_CTL_DSE_25ohm
  20
  21 enum {
  22         VF610_PAD_PTA6__RMII0_CLKIN             = IOMUX_PAD(0x0000, 0x0000, 2, __NA_, 0, VF610_ENET_PAD_CTRL),
  23         VF610_PAD_PTB4__UART1_TX                = IOMUX_PAD(0x0068, 0x0068, 2, 0x0380, 0, VF610_UART_PAD_CTRL),
  24         VF610_PAD_PTB5__UART1_RX                = IOMUX_PAD(0x006c, 0x006c, 2, 0x037c, 0, VF610_UART_PAD_CTRL),
  25         VF610_PAD_PTC1__RMII0_MDIO              = IOMUX_PAD(0x00b8, 0x00b8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
  26         VF610_PAD_PTC0__RMII0_MDC               = IOMUX_PAD(0x00b4, 0x00b4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
  27         VF610_PAD_PTC2__RMII0_CRS_DV            = IOMUX_PAD(0x00bc, 0x00bc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
  28         VF610_PAD_PTC3__RMII0_RD1               = IOMUX_PAD(0x00c0, 0x00c0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
  29         VF610_PAD_PTC4__RMII0_RD0               = IOMUX_PAD(0x00c4, 0x00c4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
  30         VF610_PAD_PTC5__RMII0_RXER              = IOMUX_PAD(0x00c8, 0x00c8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
  31         VF610_PAD_PTC6__RMII0_TD1               = IOMUX_PAD(0x00cc, 0x00cc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
  32         VF610_PAD_PTC7__RMII0_TD0               = IOMUX_PAD(0x00D0, 0x00D0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
  33         VF610_PAD_PTC8__RMII0_TXEN              = IOMUX_PAD(0x00D4, 0x00D4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
  34         VF610_PAD_PTA24__ESDHC1_CLK             = IOMUX_PAD(0x0038, 0x0038, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
  35         VF610_PAD_PTA25__ESDHC1_CMD             = IOMUX_PAD(0x003c, 0x003c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
  36         VF610_PAD_PTA26__ESDHC1_DAT0            = IOMUX_PAD(0x0040, 0x0040, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
  37         VF610_PAD_PTA27__ESDHC1_DAT1            = IOMUX_PAD(0x0044, 0x0044, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
  38         VF610_PAD_PTA28__ESDHC1_DAT2            = IOMUX_PAD(0x0048, 0x0048, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
  39         VF610_PAD_PTA29__ESDHC1_DAT3            = IOMUX_PAD(0x004c, 0x004c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
  40         VF610_PAD_DDR_A15__DDR_A_15             = IOMUX_PAD(0x0220, 0x0220, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  41         VF610_PAD_DDR_A14__DDR_A_14             = IOMUX_PAD(0x0224, 0x0224, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  42         VF610_PAD_DDR_A13__DDR_A_13             = IOMUX_PAD(0x0228, 0x0228, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  43         VF610_PAD_DDR_A12__DDR_A_12             = IOMUX_PAD(0x022c, 0x022c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  44         VF610_PAD_DDR_A11__DDR_A_11             = IOMUX_PAD(0x0230, 0x0230, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  45         VF610_PAD_DDR_A10__DDR_A_10             = IOMUX_PAD(0x0234, 0x0234, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  46         VF610_PAD_DDR_A9__DDR_A_9               = IOMUX_PAD(0x0238, 0x0238, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  47         VF610_PAD_DDR_A8__DDR_A_8               = IOMUX_PAD(0x023c, 0x023c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  48         VF610_PAD_DDR_A7__DDR_A_7               = IOMUX_PAD(0x0240, 0x0240, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  49         VF610_PAD_DDR_A6__DDR_A_6               = IOMUX_PAD(0x0244, 0x0244, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  50         VF610_PAD_DDR_A5__DDR_A_5               = IOMUX_PAD(0x0248, 0x0248, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  51         VF610_PAD_DDR_A4__DDR_A_4               = IOMUX_PAD(0x024c, 0x024c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  52         VF610_PAD_DDR_A3__DDR_A_3               = IOMUX_PAD(0x0250, 0x0250, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  53         VF610_PAD_DDR_A2__DDR_A_2               = IOMUX_PAD(0x0254, 0x0254, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  54         VF610_PAD_DDR_A1__DDR_A_1               = IOMUX_PAD(0x0258, 0x0258, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  55         VF610_PAD_DDR_BA2__DDR_BA_2             = IOMUX_PAD(0x0260, 0x0260, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  56         VF610_PAD_DDR_BA1__DDR_BA_1             = IOMUX_PAD(0x0264, 0x0264, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  57         VF610_PAD_DDR_BA0__DDR_BA_0             = IOMUX_PAD(0x0268, 0x0268, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  58         VF610_PAD_DDR_CAS__DDR_CAS_B            = IOMUX_PAD(0x026c, 0x026c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  59         VF610_PAD_DDR_CKE__DDR_CKE_0            = IOMUX_PAD(0x0270, 0x0270, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  60         VF610_PAD_DDR_CLK__DDR_CLK_0            = IOMUX_PAD(0x0274, 0x0274, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  61         VF610_PAD_DDR_CS__DDR_CS_B_0            = IOMUX_PAD(0x0278, 0x0278, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  62         VF610_PAD_DDR_D15__DDR_D_15             = IOMUX_PAD(0x027c, 0x027c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  63         VF610_PAD_DDR_D14__DDR_D_14             = IOMUX_PAD(0x0280, 0x0280, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  64         VF610_PAD_DDR_D13__DDR_D_13             = IOMUX_PAD(0x0284, 0x0284, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  65         VF610_PAD_DDR_D12__DDR_D_12             = IOMUX_PAD(0x0288, 0x0288, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  66         VF610_PAD_DDR_D11__DDR_D_11             = IOMUX_PAD(0x028c, 0x028c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  67         VF610_PAD_DDR_D10__DDR_D_10             = IOMUX_PAD(0x0290, 0x0290, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  68         VF610_PAD_DDR_D9__DDR_D_9               = IOMUX_PAD(0x0294, 0x0294, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  69         VF610_PAD_DDR_D8__DDR_D_8               = IOMUX_PAD(0x0298, 0x0298, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  70         VF610_PAD_DDR_D7__DDR_D_7               = IOMUX_PAD(0x029c, 0x029c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  71         VF610_PAD_DDR_D6__DDR_D_6               = IOMUX_PAD(0x02a0, 0x02a0, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  72         VF610_PAD_DDR_D5__DDR_D_5               = IOMUX_PAD(0x02a4, 0x02a4, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  73         VF610_PAD_DDR_D4__DDR_D_4               = IOMUX_PAD(0x02a8, 0x02a8, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  74         VF610_PAD_DDR_D3__DDR_D_3               = IOMUX_PAD(0x02ac, 0x02ac, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  75         VF610_PAD_DDR_D2__DDR_D_2               = IOMUX_PAD(0x02b0, 0x02b0, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  76         VF610_PAD_DDR_D1__DDR_D_1               = IOMUX_PAD(0x02b4, 0x02b4, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  77         VF610_PAD_DDR_D0__DDR_D_0               = IOMUX_PAD(0x02b8, 0x02b8, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  78         VF610_PAD_DDR_DQM1__DDR_DQM_1           = IOMUX_PAD(0x02bc, 0x02bc, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  79         VF610_PAD_DDR_DQM0__DDR_DQM_0           = IOMUX_PAD(0x02c0, 0x02c0, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  80         VF610_PAD_DDR_DQS1__DDR_DQS_1           = IOMUX_PAD(0x02c4, 0x02c4, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  81         VF610_PAD_DDR_DQS0__DDR_DQS_0           = IOMUX_PAD(0x02c8, 0x02c8, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  82         VF610_PAD_DDR_RAS__DDR_RAS_B            = IOMUX_PAD(0x02cc, 0x02cc, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  83         VF610_PAD_DDR_WE__DDR_WE_B              = IOMUX_PAD(0x02d0, 0x02d0, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  84         VF610_PAD_DDR_ODT1__DDR_ODT_0           = IOMUX_PAD(0x02d4, 0x02d4, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  85         VF610_PAD_DDR_ODT0__DDR_ODT_1           = IOMUX_PAD(0x02d8, 0x02d8, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
  86 };
  87
  88 #endif  /* __IOMUX_VF610_H__ */