arch/arm/include/asm/fsl_secure_boot.h

   1 /*
   2  * Copyright 2015 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __FSL_SECURE_BOOT_H
   8 #define __FSL_SECURE_BOOT_H
   9
  10 #ifdef CONFIG_SECURE_BOOT
  11 #define CONFIG_CMD_ESBC_VALIDATE
  12 #define CONFIG_FSL_SEC_MON
  13 #define CONFIG_SHA_PROG_HW_ACCEL
  14 #define CONFIG_RSA
  15 #define CONFIG_RSA_FREESCALE_EXP
  16
  17 #ifndef CONFIG_FSL_CAAM
  18 #define CONFIG_FSL_CAAM
  19 #endif
  20
  21 #ifndef CONFIG_DM
  22 #define CONFIG_DM
  23 #endif
  24
  25 #define CONFIG_KEY_REVOCATION
  26 #ifndef CONFIG_SYS_RAMBOOT
  27 /* The key used for verification of next level images
  28  * is picked up from an Extension Table which has
  29  * been verified by the ISBC (Internal Secure boot Code)
  30  * in boot ROM of the SoC.
  31  * The feature is only applicable in case of NOR boot and is
  32  * not applicable in case of RAMBOOT (NAND, SD, SPI).
  33  */
  34 #define CONFIG_FSL_ISBC_KEY_EXT
  35 #endif
  36
  37 #ifdef CONFIG_LS1043A
  38 /* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit */
  39 #define CONFIG_ESBC_ADDR_64BIT
  40 #endif
  41
  42 #ifndef CONFIG_FIT_SIGNATURE
  43
  44 #define CONFIG_EXTRA_ENV \
  45         "setenv fdt_high 0xcfffffff;"   \
  46         "setenv initrd_high 0xcfffffff;"        \
  47         "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
  48
  49 /* The address needs to be modified according to NOR memory map */
  50 #define CONFIG_BOOTSCRIPT_HDR_ADDR      0x600a0000
  51
  52 #include <config_fsl_secboot.h>
  53 #endif
  54 #endif
  55
  56 #endif