arch/arm/include/asm/mach-imx/sys_proto.h

   1 /*
   2  * (C) Copyright 2009
   3  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef _SYS_PROTO_H_
   9 #define _SYS_PROTO_H_
  10
  11 #include <asm/io.h>
  12 #include <asm/mach-imx/regs-common.h>
  13 #include <common.h>
  14 #include "../arch-imx/cpu.h"
  15
  16 #define soc_rev() (get_cpu_rev() & 0xFF)
  17 #define is_soc_rev(rev) (soc_rev() == rev)
  18
  19 /* returns MXC_CPU_ value */
  20 #define cpu_type(rev) (((rev) >> 12) & 0xff)
  21 #define soc_type(rev) (((rev) >> 12) & 0xf0)
  22 /* both macros return/take MXC_CPU_ constants */
  23 #define get_cpu_type() (cpu_type(get_cpu_rev()))
  24 #define get_soc_type() (soc_type(get_cpu_rev()))
  25 #define is_cpu_type(cpu) (get_cpu_type() == cpu)
  26 #define is_soc_type(soc) (get_soc_type() == soc)
  27
  28 #define is_mx6() (is_soc_type(MXC_SOC_MX6))
  29 #define is_mx7() (is_soc_type(MXC_SOC_MX7))
  30
  31 #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
  32 #define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
  33 #define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6DL))
  34 #define is_mx6dl() (is_cpu_type(MXC_CPU_MX6DL))
  35 #define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX))
  36 #define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL))
  37 #define is_mx6solo() (is_cpu_type(MXC_CPU_MX6SOLO))
  38 #define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL))
  39 #define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL))
  40 #define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL))
  41
  42 #define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP))
  43
  44 #ifdef CONFIG_MX6
  45 #define IMX6_SRC_GPR10_BMODE            BIT(28)
  46
  47 #define IMX6_BMODE_MASK                 GENMASK(7, 0)
  48 #define IMX6_BMODE_SHIFT                4
  49 #define IMX6_BMODE_EMI_MASK             BIT(3)
  50 #define IMX6_BMODE_EMI_SHIFT            3
  51 #define IMX6_BMODE_SERIAL_ROM_MASK      GENMASK(26, 24)
  52 #define IMX6_BMODE_SERIAL_ROM_SHIFT     24
  53
  54 enum imx6_bmode_serial_rom {
  55         IMX6_BMODE_ECSPI1,
  56         IMX6_BMODE_ECSPI2,
  57         IMX6_BMODE_ECSPI3,
  58         IMX6_BMODE_ECSPI4,
  59         IMX6_BMODE_ECSPI5,
  60         IMX6_BMODE_I2C1,
  61         IMX6_BMODE_I2C2,
  62         IMX6_BMODE_I2C3,
  63 };
  64
  65 enum imx6_bmode_emi {
  66         IMX6_BMODE_ONENAND,
  67         IMX6_BMODE_NOR,
  68 };
  69
  70 enum imx6_bmode {
  71         IMX6_BMODE_EMI,
  72 #if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
  73         IMX6_BMODE_QSPI,
  74         IMX6_BMODE_RESERVED,
  75 #else
  76         IMX6_BMODE_RESERVED,
  77         IMX6_BMODE_SATA,
  78 #endif
  79         IMX6_BMODE_SERIAL_ROM,
  80         IMX6_BMODE_SD,
  81         IMX6_BMODE_ESD,
  82         IMX6_BMODE_MMC,
  83         IMX6_BMODE_EMMC,
  84         IMX6_BMODE_NAND,
  85 };
  86
  87 static inline u8 imx6_is_bmode_from_gpr9(void)
  88 {
  89         return readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE;
  90 }
  91
  92 u32 imx6_src_get_boot_mode(void);
  93 #endif /* CONFIG_MX6 */
  94
  95 u32 get_nr_cpus(void);
  96 u32 get_cpu_rev(void);
  97 u32 get_cpu_speed_grade_hz(void);
  98 u32 get_cpu_temp_grade(int *minc, int *maxc);
  99 const char *get_imx_type(u32 imxtype);
 100 u32 imx_ddr_size(void);
 101 void sdelay(unsigned long);
 102 void set_chipselect_size(int const);
 103
 104 void init_aips(void);
 105 void init_src(void);
 106 void imx_set_wdog_powerdown(bool enable);
 107
 108 /*
 109  * Initializes on-chip ethernet controllers.
 110  * to override, implement board_eth_init()
 111  */
 112 int fecmxc_initialize(bd_t *bis);
 113 u32 get_ahb_clk(void);
 114 u32 get_periph_clk(void);
 115
 116 void lcdif_power_down(void);
 117
 118 int mxs_reset_block(struct mxs_register_32 *reg);
 119 int mxs_wait_mask_set(struct mxs_register_32 *reg, u32 mask, u32 timeout);
 120 int mxs_wait_mask_clr(struct mxs_register_32 *reg, u32 mask, u32 timeout);
 121 #endif