2 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/system.h>
12 #include <asm/arch/clock.h>
13 #include <asm/arch/sys_proto.h>
14 #include <asm/mach-imx/hab.h>
16 /* -------- start of HAB API updates ------------*/
18 #define hab_rvt_report_event_p \
21 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
22 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
23 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
24 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
25 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
26 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
29 #define hab_rvt_report_status_p \
32 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
33 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
34 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
35 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
36 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
37 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
40 #define hab_rvt_authenticate_image_p \
43 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
44 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
45 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
46 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
47 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
48 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
51 #define hab_rvt_entry_p \
54 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
55 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
56 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
57 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
58 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
59 ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
62 #define hab_rvt_exit_p \
65 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
66 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
67 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
68 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
69 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
70 ((hab_rvt_exit_t *)HAB_RVT_EXIT) \
74 #define ALIGN_SIZE 0x1000
75 #define CSF_PAD_SIZE 0x2000
76 #define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
77 #define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
78 #define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
79 #define IS_HAB_ENABLED_BIT \
80 (is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
81 (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))
84 * +------------+ 0x0 (DDR_UIMAGE_START) -
86 * +------------+ 0x40 |
93 * . | > Stuff to be authenticated ----+
101 * +------------+ Align to ALIGN_SIZE | |
103 * +------------+ + IVT_SIZE - |
105 * | CSF DATA | <---------------------------------------------------------+
111 * +------------+ + CSF_PAD_SIZE
114 static bool is_hab_enabled(void);
116 #if !defined(CONFIG_SPL_BUILD)
118 #define MAX_RECORD_BYTES (8*1024) /* 4 kbytes */
121 uint8_t tag
; /* Tag */
122 uint8_t len
[2]; /* Length */
123 uint8_t par
; /* Version */
124 uint8_t contents
[MAX_RECORD_BYTES
];/* Record Data */
128 char *rsn_str
[] = {"RSN = HAB_RSN_ANY (0x00)\n",
129 "RSN = HAB_ENG_FAIL (0x30)\n",
130 "RSN = HAB_INV_ADDRESS (0x22)\n",
131 "RSN = HAB_INV_ASSERTION (0x0C)\n",
132 "RSN = HAB_INV_CALL (0x28)\n",
133 "RSN = HAB_INV_CERTIFICATE (0x21)\n",
134 "RSN = HAB_INV_COMMAND (0x06)\n",
135 "RSN = HAB_INV_CSF (0x11)\n",
136 "RSN = HAB_INV_DCD (0x27)\n",
137 "RSN = HAB_INV_INDEX (0x0F)\n",
138 "RSN = HAB_INV_IVT (0x05)\n",
139 "RSN = HAB_INV_KEY (0x1D)\n",
140 "RSN = HAB_INV_RETURN (0x1E)\n",
141 "RSN = HAB_INV_SIGNATURE (0x18)\n",
142 "RSN = HAB_INV_SIZE (0x17)\n",
143 "RSN = HAB_MEM_FAIL (0x2E)\n",
144 "RSN = HAB_OVR_COUNT (0x2B)\n",
145 "RSN = HAB_OVR_STORAGE (0x2D)\n",
146 "RSN = HAB_UNS_ALGORITHM (0x12)\n",
147 "RSN = HAB_UNS_COMMAND (0x03)\n",
148 "RSN = HAB_UNS_ENGINE (0x0A)\n",
149 "RSN = HAB_UNS_ITEM (0x24)\n",
150 "RSN = HAB_UNS_KEY (0x1B)\n",
151 "RSN = HAB_UNS_PROTOCOL (0x14)\n",
152 "RSN = HAB_UNS_STATE (0x09)\n",
156 char *sts_str
[] = {"STS = HAB_SUCCESS (0xF0)\n",
157 "STS = HAB_FAILURE (0x33)\n",
158 "STS = HAB_WARNING (0x69)\n",
162 char *eng_str
[] = {"ENG = HAB_ENG_ANY (0x00)\n",
163 "ENG = HAB_ENG_SCC (0x03)\n",
164 "ENG = HAB_ENG_RTIC (0x05)\n",
165 "ENG = HAB_ENG_SAHARA (0x06)\n",
166 "ENG = HAB_ENG_CSU (0x0A)\n",
167 "ENG = HAB_ENG_SRTC (0x0C)\n",
168 "ENG = HAB_ENG_DCP (0x1B)\n",
169 "ENG = HAB_ENG_CAAM (0x1D)\n",
170 "ENG = HAB_ENG_SNVS (0x1E)\n",
171 "ENG = HAB_ENG_OCOTP (0x21)\n",
172 "ENG = HAB_ENG_DTCP (0x22)\n",
173 "ENG = HAB_ENG_ROM (0x36)\n",
174 "ENG = HAB_ENG_HDCP (0x24)\n",
175 "ENG = HAB_ENG_RTL (0x77)\n",
176 "ENG = HAB_ENG_SW (0xFF)\n",
180 char *ctx_str
[] = {"CTX = HAB_CTX_ANY(0x00)\n",
181 "CTX = HAB_CTX_FAB (0xFF)\n",
182 "CTX = HAB_CTX_ENTRY (0xE1)\n",
183 "CTX = HAB_CTX_TARGET (0x33)\n",
184 "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
185 "CTX = HAB_CTX_DCD (0xDD)\n",
186 "CTX = HAB_CTX_CSF (0xCF)\n",
187 "CTX = HAB_CTX_COMMAND (0xC0)\n",
188 "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
189 "CTX = HAB_CTX_ASSERT (0xA0)\n",
190 "CTX = HAB_CTX_EXIT (0xEE)\n",
194 uint8_t hab_statuses
[5] = {
202 uint8_t hab_reasons
[26] = {
231 uint8_t hab_contexts
[12] = {
236 HAB_CTX_AUTHENTICATE
,
246 uint8_t hab_engines
[16] = {
265 static inline uint8_t get_idx(uint8_t *list
, uint8_t tgt
)
268 uint8_t element
= list
[idx
];
269 while (element
!= -1) {
272 element
= list
[++idx
];
277 void process_event_record(uint8_t *event_data
, size_t bytes
)
279 struct record
*rec
= (struct record
*)event_data
;
281 printf("\n\n%s", sts_str
[get_idx(hab_statuses
, rec
->contents
[0])]);
282 printf("%s", rsn_str
[get_idx(hab_reasons
, rec
->contents
[1])]);
283 printf("%s", ctx_str
[get_idx(hab_contexts
, rec
->contents
[2])]);
284 printf("%s", eng_str
[get_idx(hab_engines
, rec
->contents
[3])]);
287 void display_event(uint8_t *event_data
, size_t bytes
)
291 if (!(event_data
&& bytes
> 0))
294 for (i
= 0; i
< bytes
; i
++) {
296 printf("\t0x%02x", event_data
[i
]);
297 else if ((i
% 8) == 0)
298 printf("\n\t0x%02x", event_data
[i
]);
300 printf(" 0x%02x", event_data
[i
]);
303 process_event_record(event_data
, bytes
);
306 int get_hab_status(void)
308 uint32_t index
= 0; /* Loop index */
309 uint8_t event_data
[128]; /* Event data buffer */
310 size_t bytes
= sizeof(event_data
); /* Event size in bytes */
311 enum hab_config config
= 0;
312 enum hab_state state
= 0;
313 hab_rvt_report_event_t
*hab_rvt_report_event
;
314 hab_rvt_report_status_t
*hab_rvt_report_status
;
316 hab_rvt_report_event
= hab_rvt_report_event_p
;
317 hab_rvt_report_status
= hab_rvt_report_status_p
;
319 if (is_hab_enabled())
320 puts("\nSecure boot enabled\n");
322 puts("\nSecure boot disabled\n");
324 /* Check HAB status */
325 if (hab_rvt_report_status(&config
, &state
) != HAB_SUCCESS
) {
326 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
329 /* Display HAB Error events */
330 while (hab_rvt_report_event(HAB_FAILURE
, index
, event_data
,
331 &bytes
) == HAB_SUCCESS
) {
333 printf("--------- HAB Event %d -----------------\n",
335 puts("event data:\n");
336 display_event(event_data
, bytes
);
338 bytes
= sizeof(event_data
);
342 /* Display message if no HAB events are found */
344 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
346 puts("No HAB Events Found!\n\n");
351 int do_hab_status(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
363 static int do_authenticate_image(cmd_tbl_t
*cmdtp
, int flag
, int argc
,
366 ulong addr
, ivt_offset
;
370 return CMD_RET_USAGE
;
372 addr
= simple_strtoul(argv
[1], NULL
, 16);
373 ivt_offset
= simple_strtoul(argv
[2], NULL
, 16);
375 rcode
= authenticate_image(addr
, ivt_offset
);
377 rcode
= CMD_RET_SUCCESS
;
379 rcode
= CMD_RET_FAILURE
;
384 hab_status
, CONFIG_SYS_MAXARGS
, 1, do_hab_status
,
385 "display HAB status",
390 hab_auth_img
, 3, 0, do_authenticate_image
,
391 "authenticate image via HAB",
393 "addr - image hex address\n"
394 "ivt_offset - hex offset of IVT in the image"
398 #endif /* !defined(CONFIG_SPL_BUILD) */
400 static bool is_hab_enabled(void)
402 struct imx_sec_config_fuse_t
*fuse
=
403 (struct imx_sec_config_fuse_t
*)&imx_sec_config_fuse
;
407 ret
= fuse_read(fuse
->bank
, fuse
->word
, ®
);
409 puts("\nSecure boot fuse read error\n");
413 return (reg
& IS_HAB_ENABLED_BIT
) == IS_HAB_ENABLED_BIT
;
416 int authenticate_image(uint32_t ddr_start
, uint32_t image_size
)
418 uint32_t load_addr
= 0;
420 ptrdiff_t ivt_offset
= 0;
423 hab_rvt_authenticate_image_t
*hab_rvt_authenticate_image
;
424 hab_rvt_entry_t
*hab_rvt_entry
;
425 hab_rvt_exit_t
*hab_rvt_exit
;
427 hab_rvt_authenticate_image
= hab_rvt_authenticate_image_p
;
428 hab_rvt_entry
= hab_rvt_entry_p
;
429 hab_rvt_exit
= hab_rvt_exit_p
;
431 if (is_hab_enabled()) {
432 printf("\nAuthenticate image from DDR location 0x%x...\n",
435 hab_caam_clock_enable(1);
437 if (hab_rvt_entry() == HAB_SUCCESS
) {
438 /* If not already aligned, Align to ALIGN_SIZE */
439 ivt_offset
= (image_size
+ ALIGN_SIZE
- 1) &
443 bytes
= ivt_offset
+ IVT_SIZE
+ CSF_PAD_SIZE
;
445 printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n",
446 ivt_offset
, ddr_start
+ ivt_offset
);
447 puts("Dumping IVT\n");
448 print_buffer(ddr_start
+ ivt_offset
,
449 (void *)(ddr_start
+ ivt_offset
),
452 puts("Dumping CSF Header\n");
453 print_buffer(ddr_start
+ ivt_offset
+IVT_SIZE
,
454 (void *)(ddr_start
+ ivt_offset
+IVT_SIZE
),
457 #if !defined(CONFIG_SPL_BUILD)
461 puts("\nCalling authenticate_image in ROM\n");
462 printf("\tivt_offset = 0x%x\n", ivt_offset
);
463 printf("\tstart = 0x%08lx\n", start
);
464 printf("\tbytes = 0x%x\n", bytes
);
467 * If the MMU is enabled, we have to notify the ROM
468 * code, or it won't flush the caches when needed.
469 * This is done, by setting the "pu_irom_mmu_enabled"
470 * word to 1. You can find its address by looking in
471 * the ROM map. This is critical for
472 * authenticate_image(). If MMU is enabled, without
473 * setting this bit, authentication will fail and may
476 /* Check MMU enabled */
477 if (is_soc_type(MXC_SOC_MX6
) && get_cr() & CR_M
) {
480 * This won't work on Rev 1.0.0 of
481 * i.MX6Q/D, since their ROM doesn't
482 * do cache flushes. don't think any
483 * exist, so we ignore them.
486 writel(1, MX6DQ_PU_IROM_MMU_EN_VAR
);
487 } else if (is_mx6sdl()) {
488 writel(1, MX6DLS_PU_IROM_MMU_EN_VAR
);
489 } else if (is_mx6sl()) {
490 writel(1, MX6SL_PU_IROM_MMU_EN_VAR
);
494 load_addr
= (uint32_t)hab_rvt_authenticate_image(
496 ivt_offset
, (void **)&start
,
497 (size_t *)&bytes
, NULL
);
498 if (hab_rvt_exit() != HAB_SUCCESS
) {
499 puts("hab exit function fail\n");
503 puts("hab entry function fail\n");
506 hab_caam_clock_enable(0);
508 #if !defined(CONFIG_SPL_BUILD)
512 puts("hab fuse not enabled\n");
515 if ((!is_hab_enabled()) || (load_addr
!= 0))