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git.ipfire.org Git - people/ms/u-boot.git/blob - arch/arm/mach-omap2/omap3/sys_info.c
3 * Texas Instruments, <www.ti.com>
6 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/mem.h> /* get mem tables */
18 #include <asm/arch/sys_proto.h>
19 #include <asm/bootm.h>
22 #include <linux/compiler.h>
24 extern omap3_sysinfo sysinfo
;
25 static struct ctrl
*ctrl_base
= (struct ctrl
*)OMAP34XX_CTRL_BASE
;
27 #ifdef CONFIG_DISPLAY_CPUINFO
28 static char *rev_s
[CPU_3XX_MAX_REV
] = {
38 /* this is the revision table for 37xx CPUs */
39 static char *rev_s_37xx
[CPU_37XX_MAX_REV
] = {
43 #endif /* CONFIG_DISPLAY_CPUINFO */
45 void omap_die_id(unsigned int *die_id
)
47 struct ctrl_id
*id_base
= (struct ctrl_id
*)OMAP34XX_ID_L4_IO_BASE
;
49 die_id
[0] = readl(&id_base
->die_id_0
);
50 die_id
[1] = readl(&id_base
->die_id_1
);
51 die_id
[2] = readl(&id_base
->die_id_2
);
52 die_id
[3] = readl(&id_base
->die_id_3
);
55 /******************************************
56 * get_cpu_type(void) - extract cpu info
57 ******************************************/
58 u32
get_cpu_type(void)
60 return readl(&ctrl_base
->ctrl_omap_stat
);
63 /******************************************
64 * get_cpu_id(void) - extract cpu id
65 * returns 0 for ES1.0, cpuid otherwise
66 ******************************************/
69 struct ctrl_id
*id_base
;
73 * On ES1.0 the IDCODE register is not exposed on L4
74 * so using CPU ID to differentiate between ES1.0 and > ES1.0.
76 __asm__
__volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid
));
77 if ((cpuid
& 0xf) == 0x0) {
80 /* Decode the IDs on > ES1.0 */
81 id_base
= (struct ctrl_id
*) OMAP34XX_ID_L4_IO_BASE
;
83 cpuid
= readl(&id_base
->idcode
);
89 /******************************************
90 * get_cpu_family(void) - extract cpu info
91 ******************************************/
92 u32
get_cpu_family(void)
96 u32 cpuid
= get_cpu_id();
101 hawkeye
= (cpuid
>> HAWKEYE_SHIFT
) & 0xffff;
103 case HAWKEYE_OMAP34XX
:
104 cpu_family
= CPU_OMAP34XX
;
107 cpu_family
= CPU_AM35XX
;
109 case HAWKEYE_OMAP36XX
:
110 cpu_family
= CPU_OMAP36XX
;
113 cpu_family
= CPU_OMAP34XX
;
119 /******************************************
120 * get_cpu_rev(void) - extract version info
121 ******************************************/
122 u32
get_cpu_rev(void)
124 u32 cpuid
= get_cpu_id();
129 return (cpuid
>> CPU_3XX_ID_SHIFT
) & 0xf;
132 /*****************************************************************
133 * get_sku_id(void) - read sku_id to get info on max clock rate
134 *****************************************************************/
137 struct ctrl_id
*id_base
= (struct ctrl_id
*)OMAP34XX_ID_L4_IO_BASE
;
138 return readl(&id_base
->sku_id
) & SKUID_CLK_MASK
;
141 /***************************************************************************
142 * get_gpmc0_base() - Return current address hardware will be
143 * fetching from. The below effectively gives what is correct, its a bit
144 * mis-leading compared to the TRM. For the most general case the mask
145 * needs to be also taken into account this does work in practice.
146 * - for u-boot we currently map:
151 ****************************************************************************/
152 u32
get_gpmc0_base(void)
156 b
= readl(&gpmc_cfg
->cs
[0].config7
);
157 b
&= 0x1F; /* keep base [5:0] */
158 b
= b
<< 24; /* ret 0x0b000000 */
162 /*******************************************************************
163 * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
164 *******************************************************************/
165 u32
get_gpmc0_width(void)
170 /*************************************************************************
171 * get_board_rev() - setup to pass kernel board revision information
172 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
173 *************************************************************************/
174 #ifdef CONFIG_REVISION_TAG
175 u32 __weak
get_board_rev(void)
181 /********************************************************
182 * get_base(); get upper addr of current execution
183 *******************************************************/
184 static u32
get_base(void)
188 __asm__
__volatile__("mov %0, pc \n":"=r"(val
)::"memory");
194 /********************************************************
195 * is_running_in_flash() - tell if currently running in
197 *******************************************************/
198 u32
is_running_in_flash(void)
201 return 1; /* in FLASH */
203 return 0; /* running in SRAM or SDRAM */
206 /********************************************************
207 * is_running_in_sram() - tell if currently running in
209 *******************************************************/
210 u32
is_running_in_sram(void)
213 return 1; /* in SRAM */
215 return 0; /* running in FLASH or SDRAM */
218 /********************************************************
219 * is_running_in_sdram() - tell if currently running in
221 *******************************************************/
222 u32
is_running_in_sdram(void)
225 return 1; /* in SDRAM */
227 return 0; /* running in SRAM or FLASH */
230 /***************************************************************
231 * get_boot_type() - Is this an XIP type device or a stream one
232 * bits 4-0 specify type. Bit 5 says mem/perif
233 ***************************************************************/
234 u32
get_boot_type(void)
236 return (readl(&ctrl_base
->status
) & SYSBOOT_MASK
);
239 /*************************************************************
240 * get_device_type(): tell if GP/HS/EMU/TST
241 *************************************************************/
242 u32
get_device_type(void)
244 return ((readl(&ctrl_base
->status
) & (DEVICE_MASK
)) >> 8);
247 #ifdef CONFIG_DISPLAY_CPUINFO
249 * Print CPU information
251 int print_cpuinfo (void)
253 char *cpu_family_s
, *cpu_s
, *sec_s
, *max_clk
;
255 switch (get_cpu_family()) {
257 cpu_family_s
= "OMAP";
258 switch (get_cpu_type()) {
275 if ((get_cpu_rev() >= CPU_3XX_ES31
) &&
276 (get_sku_id() == SKUID_CLK_720MHZ
))
284 switch (get_cpu_type()) {
298 switch (get_cpu_type()) {
320 cpu_family_s
= "OMAP";
325 cpu_family_s
= "OMAP";
330 cpu_family_s
= "OMAP";
335 cpu_family_s
= "OMAP";
340 cpu_family_s
= "OMAP/AM";
348 cpu_family_s
= "OMAP";
353 switch (get_device_type()) {
370 if (CPU_OMAP36XX
== get_cpu_family())
371 printf("%s%s-%s ES%s, CPU-OPP2, L3-200MHz, Max CPU Clock %s\n",
372 cpu_family_s
, cpu_s
, sec_s
,
373 rev_s_37xx
[get_cpu_rev()], max_clk
);
375 printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
376 cpu_family_s
, cpu_s
, sec_s
,
377 rev_s
[get_cpu_rev()], max_clk
);
381 #endif /* CONFIG_DISPLAY_CPUINFO */