arch/arm/mach-rmobile/memmap-gen3.c

   1 /*
   2  * Renesas RCar Gen3 memory map tables
   3  *
   4  * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
   5  *
   6  * SPDX-License-Identifier: GPL-2.0+
   7  */
   8
   9 #include <common.h>
  10 #include <asm/armv8/mmu.h>
  11
  12 static struct mm_region r8a7795_mem_map[] = {
  13         {
  14                 .virt = 0x0UL,
  15                 .phys = 0x0UL,
  16                 .size = 0x80000000UL,
  17                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  18                          PTE_BLOCK_INNER_SHARE
  19         }, {
  20                 .virt = 0x80000000UL,
  21                 .phys = 0x80000000UL,
  22                 .size = 0x80000000UL,
  23                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  24                          PTE_BLOCK_NON_SHARE |
  25                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  26         }, {
  27                 /* List terminator */
  28                 0,
  29         }
  30 };
  31
  32 static struct mm_region r8a7796_mem_map[] = {
  33         {
  34                 .virt = 0x0UL,
  35                 .phys = 0x0UL,
  36                 .size = 0xe0000000UL,
  37                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  38                          PTE_BLOCK_INNER_SHARE
  39         }, {
  40                 .virt = 0xe0000000UL,
  41                 .phys = 0xe0000000UL,
  42                 .size = 0xe0000000UL,
  43                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  44                          PTE_BLOCK_NON_SHARE |
  45                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  46         }, {
  47                 /* List terminator */
  48                 0,
  49         }
  50 };
  51
  52 static struct mm_region r8a77970_mem_map[] = {
  53         {
  54                 .virt = 0x0UL,
  55                 .phys = 0x0UL,
  56                 .size = 0xe0000000UL,
  57                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  58                          PTE_BLOCK_INNER_SHARE
  59         }, {
  60                 .virt = 0xe0000000UL,
  61                 .phys = 0xe0000000UL,
  62                 .size = 0xe0000000UL,
  63                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  64                          PTE_BLOCK_NON_SHARE |
  65                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  66         }, {
  67                 /* List terminator */
  68                 0,
  69         }
  70 };
  71
  72 static struct mm_region r8a77995_mem_map[] = {
  73         {
  74                 .virt = 0x0UL,
  75                 .phys = 0x0UL,
  76                 .size = 0xe0000000UL,
  77                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  78                          PTE_BLOCK_INNER_SHARE
  79         }, {
  80                 .virt = 0xe0000000UL,
  81                 .phys = 0xe0000000UL,
  82                 .size = 0xe0000000UL,
  83                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  84                          PTE_BLOCK_NON_SHARE |
  85                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  86         }, {
  87                 /* List terminator */
  88                 0,
  89         }
  90 };
  91
  92 struct mm_region *mem_map = r8a7795_mem_map;
  93
  94 void rcar_gen3_memmap_fixup(void)
  95 {
  96         u32 cpu_type = rmobile_get_cpu_type();
  97
  98         switch (cpu_type) {
  99         case RMOBILE_CPU_TYPE_R8A7795:
 100                 mem_map = r8a7795_mem_map;
 101                 break;
 102         case RMOBILE_CPU_TYPE_R8A7796:
 103                 mem_map = r8a7796_mem_map;
 104                 break;
 105         case RMOBILE_CPU_TYPE_R8A77970:
 106                 mem_map = r8a77970_mem_map;
 107                 break;
 108         case RMOBILE_CPU_TYPE_R8A77995:
 109                 mem_map = r8a77995_mem_map;
 110                 break;
 111         }
 112 }