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rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM
[people/ms/u-boot.git] / arch / arm / mach-rockchip / Kconfig
1 if ARCH_ROCKCHIP
2
3 config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
5 select CPU_V7
6 select SUPPORT_SPL
7 select SPL
8 help
9 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
10 including NEON and GPU, Mali-400 graphics, several DDR3 options
11 and video codec support. Peripherals include Gigabit Ethernet,
12 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
13
14 config ROCKCHIP_RK3188
15 bool "Support Rockchip RK3188"
16 select CPU_V7
17 select SPL_BOARD_INIT if SPL
18 select SUPPORT_SPL
19 select SUPPORT_TPL
20 select SPL
21 select TPL
22 select BOARD_LATE_INIT
23 select ROCKCHIP_BROM_HELPER
24 help
25 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
26 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
27 video interfaces, several memory options and video codec support.
28 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
29 UART, SPI, I2C and PWMs.
30
31 config ROCKCHIP_RK322X
32 bool "Support Rockchip RK3228/RK3229"
33 select CPU_V7
34 select SUPPORT_SPL
35 select SPL
36 select ROCKCHIP_BROM_HELPER
37 select DEBUG_UART_BOARD_INIT
38 help
39 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
40 including NEON and GPU, Mali-400 graphics, several DDR3 options
41 and video codec support. Peripherals include Gigabit Ethernet,
42 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
43
44 config ROCKCHIP_RK3288
45 bool "Support Rockchip RK3288"
46 select CPU_V7
47 select SPL_BOARD_INIT if SPL
48 select SUPPORT_SPL
49 select SPL
50 help
51 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
52 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
53 video interfaces supporting HDMI and eDP, several DDR3 options
54 and video codec support. Peripherals include Gigabit Ethernet,
55 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
56
57 config ROCKCHIP_RK3328
58 bool "Support Rockchip RK3328"
59 select ARM64
60 help
61 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
62 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
63 video interfaces supporting HDMI and eDP, several DDR3 options
64 and video codec support. Peripherals include Gigabit Ethernet,
65 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
66
67 config ROCKCHIP_RK3368
68 bool "Support Rockchip RK3368"
69 select ARM64
70 select SUPPORT_SPL
71 select SUPPORT_TPL
72 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
73 select TPL_NEEDS_SEPARATE_STACK if TPL
74 imply SPL_SEPARATE_BSS
75 imply SPL_SERIAL_SUPPORT
76 imply TPL_SERIAL_SUPPORT
77 select DEBUG_UART_BOARD_INIT
78 select SYS_NS16550
79 help
80 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
81 into a big and little cluster with 4 cores each) Cortex-A53 including
82 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
83 (for the little cluster), PowerVR G6110 based graphics, one video
84 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
85 video codec support.
86
87 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
88 I2S, UARTs, SPI, I2C and PWMs.
89
90 if ROCKCHIP_RK3368
91
92 config TPL_LDSCRIPT
93 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
94
95 config TPL_TEXT_BASE
96 default 0xff8c1000
97
98 config TPL_MAX_SIZE
99 default 28672
100
101 config TPL_STACK
102 default 0xff8cffff
103
104 endif
105
106 config ROCKCHIP_RK3399
107 bool "Support Rockchip RK3399"
108 select ARM64
109 select SUPPORT_SPL
110 select SPL
111 select SPL_SEPARATE_BSS
112 select SPL_SERIAL_SUPPORT
113 select SPL_DRIVERS_MISC_SUPPORT
114 select DEBUG_UART_BOARD_INIT
115 help
116 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
117 and quad-core Cortex-A53.
118 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
119 video interfaces supporting HDMI and eDP, several DDR3 options
120 and video codec support. Peripherals include Gigabit Ethernet,
121 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
122
123 config ROCKCHIP_RV1108
124 bool "Support Rockchip RV1108"
125 select CPU_V7
126 help
127 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
128 and a DSP.
129
130 config SPL_ROCKCHIP_BACK_TO_BROM
131 bool "SPL returns to bootrom"
132 default y if ROCKCHIP_RK3036
133 select ROCKCHIP_BROM_HELPER
134 depends on SPL
135 help
136 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
137 SPL will return to the boot rom, which will then load the U-Boot
138 binary to keep going on.
139
140 config TPL_ROCKCHIP_BACK_TO_BROM
141 bool "TPL returns to bootrom"
142 default y if ROCKCHIP_RK3368
143 select ROCKCHIP_BROM_HELPER
144 depends on TPL
145 help
146 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
147 SPL will return to the boot rom, which will then load the U-Boot
148 binary to keep going on.
149
150 config ROCKCHIP_SPL_RESERVE_IRAM
151 hex "Size of IRAM reserved in SPL"
152 default 0x4000
153 help
154 SPL may need reserve memory for firmware loaded by SPL, whose load
155 address is in IRAM and may overlay with SPL text area if not
156 reserved.
157
158 config ROCKCHIP_BROM_HELPER
159 bool
160
161 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
162 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
163 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
164 help
165 Some Rockchip BROM variants (e.g. on the RK3188) load the
166 first stage in segments and enter multiple times. E.g. on
167 the RK3188, the first 1KB of the first stage are loaded
168 first and entered; after returning to the BROM, the
169 remainder of the first stage is loaded, but the BROM
170 re-enters at the same address/to the same code as previously.
171
172 This enables support code in the BOOT0 hook for the SPL stage
173 to allow multiple entries.
174
175 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
176 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
177 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
178 help
179 Some Rockchip BROM variants (e.g. on the RK3188) load the
180 first stage in segments and enter multiple times. E.g. on
181 the RK3188, the first 1KB of the first stage are loaded
182 first and entered; after returning to the BROM, the
183 remainder of the first stage is loaded, but the BROM
184 re-enters at the same address/to the same code as previously.
185
186 This enables support code in the BOOT0 hook for the TPL stage
187 to allow multiple entries.
188
189 config SPL_MMC_SUPPORT
190 default y if !SPL_ROCKCHIP_BACK_TO_BROM
191
192 source "arch/arm/mach-rockchip/rk3036/Kconfig"
193 source "arch/arm/mach-rockchip/rk3188/Kconfig"
194 source "arch/arm/mach-rockchip/rk322x/Kconfig"
195 source "arch/arm/mach-rockchip/rk3288/Kconfig"
196 source "arch/arm/mach-rockchip/rk3328/Kconfig"
197 source "arch/arm/mach-rockchip/rk3368/Kconfig"
198 source "arch/arm/mach-rockchip/rk3399/Kconfig"
199 source "arch/arm/mach-rockchip/rv1108/Kconfig"
200 endif