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1 /*
2 * (C) Copyright 2015 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #include <common.h>
8 #include <debug_uart.h>
9 #include <dm.h>
10 #include <fdtdec.h>
11 #include <led.h>
12 #include <malloc.h>
13 #include <ram.h>
14 #include <spl.h>
15 #include <asm/gpio.h>
16 #include <asm/io.h>
17 #include <asm/arch/clock.h>
18 #include <asm/arch/hardware.h>
19 #include <asm/arch/periph.h>
20 #include <asm/arch/sdram.h>
21 #include <asm/arch/timer.h>
22 #include <dm/pinctrl.h>
23 #include <dm/root.h>
24 #include <dm/test.h>
25 #include <dm/util.h>
26 #include <power/regulator.h>
27
28 DECLARE_GLOBAL_DATA_PTR;
29
30 u32 spl_boot_device(void)
31 {
32 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
33 const void *blob = gd->fdt_blob;
34 struct udevice *dev;
35 const char *bootdev;
36 int node;
37 int ret;
38
39 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
40 debug("Boot device %s\n", bootdev);
41 if (!bootdev)
42 goto fallback;
43
44 node = fdt_path_offset(blob, bootdev);
45 if (node < 0) {
46 debug("node=%d\n", node);
47 goto fallback;
48 }
49 ret = device_get_global_by_of_offset(node, &dev);
50 if (ret) {
51 debug("device at node %s/%d not found: %d\n", bootdev, node,
52 ret);
53 goto fallback;
54 }
55 debug("Found device %s\n", dev->name);
56 switch (device_get_uclass_id(dev)) {
57 case UCLASS_SPI_FLASH:
58 return BOOT_DEVICE_SPI;
59 case UCLASS_MMC:
60 return BOOT_DEVICE_MMC1;
61 default:
62 debug("Booting from device uclass '%s' not supported\n",
63 dev_get_uclass_name(dev));
64 }
65
66 fallback:
67 #elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
68 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
69 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
70 return BOOT_DEVICE_SPI;
71 #endif
72 return BOOT_DEVICE_MMC1;
73 }
74
75 u32 spl_boot_mode(const u32 boot_device)
76 {
77 return MMCSD_MODE_RAW;
78 }
79
80 /* read L2 control register (L2CTLR) */
81 static inline uint32_t read_l2ctlr(void)
82 {
83 uint32_t val = 0;
84
85 asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
86
87 return val;
88 }
89
90 /* write L2 control register (L2CTLR) */
91 static inline void write_l2ctlr(uint32_t val)
92 {
93 /*
94 * Note: L2CTLR can only be written when the L2 memory system
95 * is idle, ie before the MMU is enabled.
96 */
97 asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory");
98 isb();
99 }
100
101 static void configure_l2ctlr(void)
102 {
103 uint32_t l2ctlr;
104
105 l2ctlr = read_l2ctlr();
106 l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
107
108 /*
109 * Data RAM write latency: 2 cycles
110 * Data RAM read latency: 2 cycles
111 * Data RAM setup latency: 1 cycle
112 * Tag RAM write latency: 1 cycle
113 * Tag RAM read latency: 1 cycle
114 * Tag RAM setup latency: 1 cycle
115 */
116 l2ctlr |= (1 << 3 | 1 << 0);
117 write_l2ctlr(l2ctlr);
118 }
119
120 #ifdef CONFIG_SPL_MMC_SUPPORT
121 static int configure_emmc(struct udevice *pinctrl)
122 {
123 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY)
124
125 struct gpio_desc desc;
126 int ret;
127
128 pinctrl_request_noflags(pinctrl, PERIPH_ID_EMMC);
129
130 /*
131 * TODO(sjg@chromium.org): Pick this up from device tree or perhaps
132 * use the EMMC_PWREN setting.
133 */
134 ret = dm_gpio_lookup_name("D9", &desc);
135 if (ret) {
136 debug("gpio ret=%d\n", ret);
137 return ret;
138 }
139 ret = dm_gpio_request(&desc, "emmc_pwren");
140 if (ret) {
141 debug("gpio_request ret=%d\n", ret);
142 return ret;
143 }
144 ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
145 if (ret) {
146 debug("gpio dir ret=%d\n", ret);
147 return ret;
148 }
149 ret = dm_gpio_set_value(&desc, 1);
150 if (ret) {
151 debug("gpio value ret=%d\n", ret);
152 return ret;
153 }
154 #endif
155 return 0;
156 }
157 #endif
158 extern void back_to_bootrom(void);
159 void board_init_f(ulong dummy)
160 {
161 struct udevice *pinctrl;
162 struct udevice *dev;
163 int ret;
164
165 /* Example code showing how to enable the debug UART on RK3288 */
166 #ifdef EARLY_UART
167 #include <asm/arch/grf_rk3288.h>
168 /* Enable early UART on the RK3288 */
169 #define GRF_BASE 0xff770000
170 struct rk3288_grf * const grf = (void *)GRF_BASE;
171
172 rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
173 GPIO7C6_MASK << GPIO7C6_SHIFT,
174 GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
175 GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
176 /*
177 * Debug UART can be used from here if required:
178 *
179 * debug_uart_init();
180 * printch('a');
181 * printhex8(0x1234);
182 * printascii("string");
183 */
184 debug_uart_init();
185 #endif
186
187 ret = spl_init();
188 if (ret) {
189 debug("spl_init() failed: %d\n", ret);
190 hang();
191 }
192
193 rockchip_timer_init();
194 configure_l2ctlr();
195
196 ret = rockchip_get_clk(&dev);
197 if (ret) {
198 debug("CLK init failed: %d\n", ret);
199 return;
200 }
201
202 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
203 if (ret) {
204 debug("Pinctrl init failed: %d\n", ret);
205 return;
206 }
207
208 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
209 if (ret) {
210 debug("DRAM init failed: %d\n", ret);
211 return;
212 }
213 #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
214 back_to_bootrom();
215 #endif
216 }
217
218 static int setup_led(void)
219 {
220 #ifdef CONFIG_SPL_LED
221 struct udevice *dev;
222 char *led_name;
223 int ret;
224
225 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
226 if (!led_name)
227 return 0;
228 ret = led_get_by_label(led_name, &dev);
229 if (ret) {
230 debug("%s: get=%d\n", __func__, ret);
231 return ret;
232 }
233 ret = led_set_on(dev, 1);
234 if (ret)
235 return ret;
236 #endif
237
238 return 0;
239 }
240
241 void spl_board_init(void)
242 {
243 struct udevice *pinctrl;
244 int ret;
245
246 ret = setup_led();
247
248 if (ret) {
249 debug("LED ret=%d\n", ret);
250 hang();
251 }
252
253 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
254 if (ret) {
255 debug("%s: Cannot find pinctrl device\n", __func__);
256 goto err;
257 }
258
259 #ifdef CONFIG_SPL_MMC_SUPPORT
260 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
261 if (ret) {
262 debug("%s: Failed to set up SD card\n", __func__);
263 goto err;
264 }
265 ret = configure_emmc(pinctrl);
266 if (ret) {
267 debug("%s: Failed to set up eMMC\n", __func__);
268 goto err;
269 }
270 #endif
271
272 /* Enable debug UART */
273 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
274 if (ret) {
275 debug("%s: Failed to set up console UART\n", __func__);
276 goto err;
277 }
278
279 preloader_console_init();
280 #ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
281 back_to_bootrom();
282 #endif
283 return;
284 err:
285 printf("spl_board_init: Error %d\n", ret);
286
287 /* No way to report error here */
288 hang();
289 }