arch/arm/mach-rockchip/rk3399/reset_rk3399.c

   1 /*
   2  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0
   5  */
   6
   7 #include <common.h>
   8 #include <dm.h>
   9 #include <errno.h>
  10 #include <sysreset.h>
  11 #include <asm/io.h>
  12 #include <asm/arch/clock.h>
  13 #include <asm/arch/cru_rk3399.h>
  14 #include <asm/arch/hardware.h>
  15 #include <linux/err.h>
  16
  17 int rk3399_sysreset_request(struct udevice *dev, enum sysreset_t type)
  18 {
  19         struct rk3399_cru *cru = rockchip_get_cru();
  20
  21         if (IS_ERR(cru))
  22                 return PTR_ERR(cru);
  23         switch (type) {
  24         case SYSRESET_WARM:
  25                 writel(0xeca8, &cru->glb_srst_snd_value);
  26                 break;
  27         case SYSRESET_COLD:
  28                 writel(0xfdb9, &cru->glb_srst_fst_value);
  29                 break;
  30         default:
  31                 return -EPROTONOSUPPORT;
  32         }
  33
  34         return -EINPROGRESS;
  35 }
  36
  37 static struct sysreset_ops rk3399_sysreset = {
  38         .request        = rk3399_sysreset_request,
  39 };
  40
  41 U_BOOT_DRIVER(sysreset_rk3399) = {
  42         .name   = "rk3399_sysreset",
  43         .id     = UCLASS_SYSRESET,
  44         .ops    = &rk3399_sysreset,
  45 };