arch/arm/mach-socfpga/Kconfig

   1 if ARCH_SOCFPGA
   2
   3 config SPL_LIBCOMMON_SUPPORT
   4         default y
   5
   6 config SPL_LIBDISK_SUPPORT
   7         default y
   8
   9 config SPL_LIBGENERIC_SUPPORT
  10         default y
  11
  12 config SPL_MMC_SUPPORT
  13         default y if DM_MMC
  14
  15 config TARGET_SOCFPGA_ARRIA5
  16         bool
  17         select TARGET_SOCFPGA_GEN5
  18
  19 config TARGET_SOCFPGA_CYCLONE5
  20         bool
  21         select TARGET_SOCFPGA_GEN5
  22
  23 config TARGET_SOCFPGA_GEN5
  24         bool
  25
  26 choice
  27         prompt "Altera SOCFPGA board select"
  28         optional
  29
  30 config TARGET_SOCFPGA_ARRIA5_SOCDK
  31         bool "Altera SOCFPGA SoCDK (Arria V)"
  32         select TARGET_SOCFPGA_ARRIA5
  33
  34 config TARGET_SOCFPGA_CYCLONE5_SOCDK
  35         bool "Altera SOCFPGA SoCDK (Cyclone V)"
  36         select TARGET_SOCFPGA_CYCLONE5
  37
  38 config TARGET_SOCFPGA_DENX_MCVEVK
  39         bool "DENX MCVEVK (Cyclone V)"
  40         select TARGET_SOCFPGA_CYCLONE5
  41
  42 config TARGET_SOCFPGA_EBV_SOCRATES
  43         bool "EBV SoCrates (Cyclone V)"
  44         select TARGET_SOCFPGA_CYCLONE5
  45
  46 config TARGET_SOCFPGA_IS1
  47         bool "IS1 (Cyclone V)"
  48         select TARGET_SOCFPGA_CYCLONE5
  49
  50 config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  51         bool "samtec VIN|ING FPGA (Cyclone V)"
  52         select TARGET_SOCFPGA_CYCLONE5
  53
  54 config TARGET_SOCFPGA_SR1500
  55         bool "SR1500 (Cyclone V)"
  56         select TARGET_SOCFPGA_CYCLONE5
  57
  58 config TARGET_SOCFPGA_TERASIC_DE0_NANO
  59         bool "Terasic DE0-Nano-Atlas (Cyclone V)"
  60         select TARGET_SOCFPGA_CYCLONE5
  61
  62 config TARGET_SOCFPGA_TERASIC_SOCKIT
  63         bool "Terasic SoCkit (Cyclone V)"
  64         select TARGET_SOCFPGA_CYCLONE5
  65
  66 endchoice
  67
  68 config SYS_BOARD
  69         default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
  70         default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  71         default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  72         default "is1" if TARGET_SOCFPGA_IS1
  73         default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
  74         default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
  75         default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
  76         default "sr1500" if TARGET_SOCFPGA_SR1500
  77         default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  78
  79 config SYS_VENDOR
  80         default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
  81         default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  82         default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
  83         default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
  84         default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  85         default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  86         default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
  87
  88 config SYS_SOC
  89         default "socfpga"
  90
  91 config SYS_CONFIG_NAME
  92         default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
  93         default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  94         default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  95         default "socfpga_is1" if TARGET_SOCFPGA_IS1
  96         default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
  97         default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
  98         default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
  99         default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
 100         default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
 101
 102 endif