2 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
3 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/armv7m_mpu.h>
12 int arch_cpu_init(void)
16 struct mpu_region_config stm32_region_config
[] = {
18 * Make all 4GB cacheable & executable. We are overriding it
19 * with next region for any requirement. e.g. below region1,
21 * In other words, the area not coming in following
22 * regions configuration is the one configured here in region_0
23 * (cacheable & executable).
25 { 0x00000000, REGION_0
, XN_DIS
, PRIV_RW_USR_RW
,
26 O_I_WB_RD_WR_ALLOC
, REGION_4GB
},
28 /* armv7m code area */
29 { 0x00000000, REGION_1
, XN_DIS
, PRIV_RW_USR_RW
,
30 STRONG_ORDER
, REGION_512MB
},
32 /* Device area : Not executable */
33 { 0x40000000, REGION_2
, XN_EN
, PRIV_RW_USR_RW
,
34 DEVICE_NON_SHARED
, REGION_512MB
},
37 * Armv7m fixed configuration: strongly ordered & not
38 * executable, not cacheable
40 { 0xE0000000, REGION_3
, XN_EN
, PRIV_RW_USR_RW
,
41 STRONG_ORDER
, REGION_512MB
},
43 #if !defined(CONFIG_STM32H7)
44 /* Device area : Not executable */
45 { 0xA0000000, REGION_4
, XN_EN
, PRIV_RW_USR_RW
,
46 DEVICE_NON_SHARED
, REGION_512MB
},
51 for (i
= 0; i
< ARRAY_SIZE(stm32_region_config
); i
++)
52 mpu_config(&stm32_region_config
[i
]);