arch/arm/mach-uniphier/dram/ddrphy-ph1-ld4.c

   1 /*
   2  * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <linux/types.h>
   8 #include <linux/io.h>
   9
  10 #include "ddrphy-regs.h"
  11
  12 int ph1_ld4_ddrphy_init(struct ddrphy __iomem *phy, int freq, int size,
  13                         bool ddr3plus)
  14 {
  15         u32 tmp;
  16
  17         writel(0x0300c473, &phy->pgcr[1]);
  18         if (freq == 1333) {
  19                 writel(0x0a806844, &phy->ptr[0]);
  20                 writel(0x208e0124, &phy->ptr[1]);
  21         } else {
  22                 writel(0x0c807d04, &phy->ptr[0]);
  23                 writel(0x2710015E, &phy->ptr[1]);
  24         }
  25         writel(0x00083DEF, &phy->ptr[2]);
  26         if (freq == 1333) {
  27                 writel(0x0f051616, &phy->ptr[3]);
  28                 writel(0x06ae08d6, &phy->ptr[4]);
  29         } else {
  30                 writel(0x12061A80, &phy->ptr[3]);
  31                 writel(0x08027100, &phy->ptr[4]);
  32         }
  33         writel(0xF004001A, &phy->dsgcr);
  34
  35         /* change the value of the on-die pull-up/pull-down registors */
  36         tmp = readl(&phy->dxccr);
  37         tmp &= ~0x0ee0;
  38         tmp |= DXCCR_DQSNRES_688_OHM | DXCCR_DQSRES_688_OHM;
  39         writel(tmp, &phy->dxccr);
  40
  41         writel(0x0000040B, &phy->dcr);
  42         if (freq == 1333) {
  43                 writel(0x85589955, &phy->dtpr[0]);
  44                 if (size == 1)
  45                         writel(0x1a8253c0, &phy->dtpr[1]);
  46                 else
  47                         writel(0x1a8363c0, &phy->dtpr[1]);
  48                 writel(0x5002c200, &phy->dtpr[2]);
  49                 writel(0x00000b51, &phy->mr0);
  50         } else {
  51                 writel(0x999cbb66, &phy->dtpr[0]);
  52                 if (size == 1)
  53                         writel(0x1a82dbc0, &phy->dtpr[1]);
  54                 else
  55                         writel(0x1a878400, &phy->dtpr[1]);
  56                 writel(0xa00214f8, &phy->dtpr[2]);
  57                 writel(0x00000d71, &phy->mr0);
  58         }
  59         writel(0x00000006, &phy->mr1);
  60         if (freq == 1333)
  61                 writel(0x00000290, &phy->mr2);
  62         else
  63                 writel(0x00000298, &phy->mr2);
  64
  65         writel(ddr3plus ? 0x00000800 : 0x00000000, &phy->mr3);
  66
  67         while (!(readl(&phy->pgsr[0]) & PGSR0_IDONE))
  68                 ;
  69
  70         writel(0x0300C473, &phy->pgcr[1]);
  71         writel(0x0000005D, &phy->zq[0].cr[1]);
  72
  73         return 0;
  74 }