arch/arm/mach-zynq/include/mach/ps7_init_gpl.h

   1 /*
   2  * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
   3  * (c) Copyright 2016 Topic Embedded Products.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef _ASM_ARCH_PS7_INIT_GPL_H
   9 #define _ASM_ARCH_PS7_INIT_GPL_H
  10
  11 /* Opcode exit is 0 all the time */
  12 #define OPCODE_EXIT             0U
  13 #define OPCODE_MASKWRITE        0U
  14 #define OPCODE_MASKPOLL         1U
  15 #define OPCODE_MASKDELAY        2U
  16 #define OPCODE_WRITE            3U
  17 #define OPCODE_ADDRESS_MASK     (~3U)
  18
  19 /* Sentinel */
  20 #define EMIT_EXIT()                     OPCODE_EXIT
  21 /* Opcode is in lower 2 bits of address, address is always 4-byte aligned */
  22 #define EMIT_MASKWRITE(addr, mask, val) OPCODE_MASKWRITE | addr, mask, val
  23 #define EMIT_MASKPOLL(addr, mask)       OPCODE_MASKPOLL | addr, mask
  24 #define EMIT_MASKDELAY(addr, mask)      OPCODE_MASKDELAY | addr, mask
  25 #define EMIT_WRITE(addr, val)           OPCODE_WRITE | addr, val
  26
  27 /* Returns codes of ps7_init* */
  28 #define PS7_INIT_SUCCESS                (0)
  29 #define PS7_INIT_CORRUPT                (1)
  30 #define PS7_INIT_TIMEOUT                (2)
  31 #define PS7_POLL_FAILED_DDR_INIT        (3)
  32 #define PS7_POLL_FAILED_DMA             (4)
  33 #define PS7_POLL_FAILED_PLL             (5)
  34
  35 #define PCW_SILICON_VERSION_1   0
  36 #define PCW_SILICON_VERSION_2   1
  37 #define PCW_SILICON_VERSION_3   2
  38
  39 /* Called by spl.c */
  40 int ps7_init(void);
  41 int ps7_post_config(void);
  42
  43 /* Defined in ps7_init_common.c */
  44 int ps7_config(unsigned long *ps7_config_init);
  45
  46 unsigned long ps7GetSiliconVersion(void);
  47
  48 #endif /* _ASM_ARCH_PS7_INIT_GPL_H */