arch/blackfin/include/asm/mach-bf527/BF522_def.h

   1 /* DO NOT EDIT THIS FILE
   2  * Automatically generated by generate-def-headers.xsl
   3  * DO NOT EDIT THIS FILE
   4  */
   5
   6 #ifndef __BFIN_DEF_ADSP_BF522_proc__
   7 #define __BFIN_DEF_ADSP_BF522_proc__
   8
   9 #include "../mach-common/ADSP-EDN-core_def.h"
  10
  11 #include "ADSP-EDN-BF52x-extended_def.h"
  12
  13 #define PLL_CTL                        0xFFC00000 /* PLL Control Register */
  14 #define PLL_DIV                        0xFFC00004 /* PLL Divide Register */
  15 #define VR_CTL                         0xFFC00008 /* Voltage Regulator Control Register */
  16 #define PLL_STAT                       0xFFC0000C /* PLL Status Register */
  17 #define PLL_LOCKCNT                    0xFFC00010 /* PLL Lock Count Register */
  18 #define CHIPID                         0xFFC00014
  19 #define SWRST                          0xFFC00100 /* Software Reset Register */
  20 #define SYSCR                          0xFFC00104 /* System Configuration register */
  21
  22 #endif /* __BFIN_DEF_ADSP_BF522_proc__ */