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[people/ms/u-boot.git] / arch / blackfin / include / asm / mach-common / bits / spi.h
1 /*
2 * SPI Masks
3 */
4
5 #ifndef __BFIN_PERIPHERAL_SPI__
6 #define __BFIN_PERIPHERAL_SPI__
7
8 /* SPI_CTL Masks */
9 #define TIMOD 0x0003 /* Transfer Initiate Mode */
10 #define RDBR_CORE 0x0000 /* RDBR Read Initiates, IRQ When RDBR Full */
11 #define TDBR_CORE 0x0001 /* TDBR Write Initiates, IRQ When TDBR Empty */
12 #define RDBR_DMA 0x0002 /* DMA Read, DMA Until FIFO Empty */
13 #define TDBR_DMA 0x0003 /* DMA Write, DMA Until FIFO Full */
14 #define SZ 0x0004 /* Send Zero (When TDBR Empty, Send Zero/Last*) */
15 #define GM 0x0008 /* Get More (When RDBR Full, Overwrite/Discard*) */
16 #define PSSE 0x0010 /* Slave-Select Input Enable */
17 #define EMISO 0x0020 /* Enable MISO As Output */
18 #define SIZE 0x0100 /* Size of Words (16/8* Bits) */
19 #define LSBF 0x0200 /* LSB First */
20 #define CPHA 0x0400 /* Clock Phase */
21 #define CPOL 0x0800 /* Clock Polarity */
22 #define MSTR 0x1000 /* Master/Slave* */
23 #define WOM 0x2000 /* Write Open Drain Master */
24 #define SPE 0x4000 /* SPI Enable */
25
26 /* SPI_FLG Masks */
27 #define FLS1 0x0002 /* Enables (=1) SPI_FLOUT1 as flag output for SPI Slave-select */
28 #define FLS2 0x0004 /* Enables (=1) SPI_FLOUT2 as flag output for SPI Slave-select */
29 #define FLS3 0x0008 /* Enables (=1) SPI_FLOUT3 as flag output for SPI Slave-select */
30 #define FLS4 0x0010 /* Enables (=1) SPI_FLOUT4 as flag output for SPI Slave-select */
31 #define FLS5 0x0020 /* Enables (=1) SPI_FLOUT5 as flag output for SPI Slave-select */
32 #define FLS6 0x0040 /* Enables (=1) SPI_FLOUT6 as flag output for SPI Slave-select */
33 #define FLS7 0x0080 /* Enables (=1) SPI_FLOUT7 as flag output for SPI Slave-select */
34 #define FLG1 0x0200 /* Activates (=0) SPI_FLOUT1 as flag output for SPI Slave-select */
35 #define FLG2 0x0400 /* Activates (=0) SPI_FLOUT2 as flag output for SPI Slave-select */
36 #define FLG3 0x0800 /* Activates (=0) SPI_FLOUT3 as flag output for SPI Slave-select */
37 #define FLG4 0x1000 /* Activates (=0) SPI_FLOUT4 as flag output for SPI Slave-select */
38 #define FLG5 0x2000 /* Activates (=0) SPI_FLOUT5 as flag output for SPI Slave-select */
39 #define FLG6 0x4000 /* Activates (=0) SPI_FLOUT6 as flag output for SPI Slave-select */
40 #define FLG7 0x8000 /* Activates (=0) SPI_FLOUT7 as flag output for SPI Slave-select */
41
42 /* SPI_FLG Bit Positions */
43 #define FLS1_P 0x0001 /* Enables (=1) SPI_FLOUT1 as flag output for SPI Slave-select */
44 #define FLS2_P 0x0002 /* Enables (=1) SPI_FLOUT2 as flag output for SPI Slave-select */
45 #define FLS3_P 0x0003 /* Enables (=1) SPI_FLOUT3 as flag output for SPI Slave-select */
46 #define FLS4_P 0x0004 /* Enables (=1) SPI_FLOUT4 as flag output for SPI Slave-select */
47 #define FLS5_P 0x0005 /* Enables (=1) SPI_FLOUT5 as flag output for SPI Slave-select */
48 #define FLS6_P 0x0006 /* Enables (=1) SPI_FLOUT6 as flag output for SPI Slave-select */
49 #define FLS7_P 0x0007 /* Enables (=1) SPI_FLOUT7 as flag output for SPI Slave-select */
50 #define FLG1_P 0x0009 /* Activates (=0) SPI_FLOUT1 as flag output for SPI Slave-select */
51 #define FLG2_P 0x000A /* Activates (=0) SPI_FLOUT2 as flag output for SPI Slave-select */
52 #define FLG3_P 0x000B /* Activates (=0) SPI_FLOUT3 as flag output for SPI Slave-select */
53 #define FLG4_P 0x000C /* Activates (=0) SPI_FLOUT4 as flag output for SPI Slave-select */
54 #define FLG5_P 0x000D /* Activates (=0) SPI_FLOUT5 as flag output for SPI Slave-select */
55 #define FLG6_P 0x000E /* Activates (=0) SPI_FLOUT6 as flag output for SPI Slave-select */
56 #define FLG7_P 0x000F /* Activates (=0) SPI_FLOUT7 as flag output for SPI Slave-select */
57
58 /* SPI_STAT Masks */
59 #define SPIF 0x0001 /* SPI Finished (Single-Word Transfer Complete) */
60 #define MODF 0x0002 /* Mode Fault Error (Another Device Tried To Become Master) */
61 #define TXE 0x0004 /* Transmission Error (Data Sent With No New Data In TDBR) */
62 #define TXS 0x0008 /* SPI_TDBR Data Buffer Status (Full/Empty*) */
63 #define RBSY 0x0010 /* Receive Error (Data Received With RDBR Full) */
64 #define RXS 0x0020 /* SPI_RDBR Data Buffer Status (Full/Empty*) */
65 #define TXCOL 0x0040 /* Transmit Collision Error (Corrupt Data May Have Been Sent) */
66
67 #endif