arch/powerpc/cpu/mpc85xx/cpu_init_early.c

   1 /*
   2  * Copyright 2009 Freescale Semiconductor, Inc
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation; either version 2 of
   7  * the License, or (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17  * MA 02111-1307 USA
  18  */
  19
  20 #include <common.h>
  21 #include <asm/processor.h>
  22 #include <asm/mmu.h>
  23 #include <asm/fsl_law.h>
  24
  25 DECLARE_GLOBAL_DATA_PTR;
  26
  27 #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS)
  28 #ifdef CONFIG_FSL_CORENET
  29 static void setup_ccsrbar(void)
  30 {
  31         u32 temp;
  32         volatile u32 *ccsr_virt = (volatile u32 *)(CONFIG_SYS_CCSRBAR + 0x1000);
  33         volatile ccsr_local_t *ccm;
  34
  35         /*
  36          * We can't call set_law() because we haven't moved
  37          * CCSR yet.
  38          */
  39         ccm = (void *)ccsr_virt;
  40
  41         out_be32(&ccm->law[0].lawbarh,
  42                 (u64)CONFIG_SYS_CCSRBAR_PHYS >> 32);
  43         out_be32(&ccm->law[0].lawbarl, (u32)CONFIG_SYS_CCSRBAR_PHYS);
  44         out_be32(&ccm->law[0].lawar,
  45                 LAW_EN | (0x1e << 20) | LAW_SIZE_4K);
  46
  47         in_be32((u32 *)(ccsr_virt + 0));
  48         in_be32((u32 *)(ccsr_virt + 1));
  49         isync();
  50
  51         ccm = (void *)CONFIG_SYS_CCSRBAR;
  52         /* Now use the temporary LAW to move CCSR */
  53         out_be32(&ccm->ccsrbarh, (u64)CONFIG_SYS_CCSRBAR_PHYS >> 32);
  54         out_be32(&ccm->ccsrbarl, (u32)CONFIG_SYS_CCSRBAR_PHYS);
  55         out_be32(&ccm->ccsrar, CCSRAR_C);
  56         temp = in_be32(&ccm->ccsrar);
  57         disable_law(0);
  58 }
  59 #else
  60 static void setup_ccsrbar(void)
  61 {
  62         u32 temp;
  63         volatile u32 *ccsr_virt = (volatile u32 *)(CONFIG_SYS_CCSRBAR + 0x1000);
  64
  65         temp = in_be32(ccsr_virt);
  66         out_be32(ccsr_virt, CONFIG_SYS_CCSRBAR_PHYS >> 12);
  67         temp = in_be32((volatile u32 *)CONFIG_SYS_CCSRBAR);
  68 }
  69 #endif
  70 #endif
  71
  72 /* We run cpu_init_early_f in AS = 1 */
  73 void cpu_init_early_f(void)
  74 {
  75         u32 mas0, mas1, mas2, mas3, mas7;
  76         int i;
  77
  78         /* Pointer is writable since we allocated a register for it */
  79         gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
  80
  81         /*
  82          * Clear initial global data
  83          *   we don't use memset so we can share this code with NAND_SPL
  84          */
  85         for (i = 0; i < sizeof(gd_t); i++)
  86                 ((char *)gd)[i] = 0;
  87
  88         mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(0);
  89         mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_TSIZE(BOOKE_PAGESZ_4K);
  90         mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR, MAS2_I|MAS2_G);
  91         mas3 = FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS, 0, MAS3_SW|MAS3_SR);
  92         mas7 = FSL_BOOKE_MAS7(CONFIG_SYS_CCSRBAR_PHYS);
  93
  94         write_tlb(mas0, mas1, mas2, mas3, mas7);
  95
  96         /* set up CCSR if we want it moved */
  97 #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS)
  98         mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(1);
  99         /* mas1 is the same as above */
 100         mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR + 0x1000, MAS2_I|MAS2_G);
 101         mas3 = FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_DEFAULT, 0, MAS3_SW|MAS3_SR);
 102         mas7 = FSL_BOOKE_MAS7(CONFIG_SYS_CCSRBAR_DEFAULT);
 103
 104         write_tlb(mas0, mas1, mas2, mas3, mas7);
 105
 106         setup_ccsrbar();
 107 #endif
 108
 109         init_laws();
 110         invalidate_tlb(0);
 111         init_tlbs();
 112 }