arch/powerpc/cpu/mpc85xx/traps.c

   1 /*
   2  * linux/arch/powerpc/kernel/traps.c
   3  *
   4  * Copyright 2007 Freescale Semiconductor.
   5  * Copyright (C) 2003 Motorola
   6  * Modified by Xianghua Xiao(x.xiao@motorola.com)
   7  *
   8  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
   9  *
  10  * Modified by Cort Dougan (cort@cs.nmt.edu)
  11  * and Paul Mackerras (paulus@cs.anu.edu.au)
  12  *
  13  * (C) Copyright 2000
  14  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  15  *
  16  * SPDX-License-Identifier:     GPL-2.0+
  17  */
  18
  19 /*
  20  * This file handles the architecture-dependent parts of hardware exceptions
  21  */
  22
  23 #include <common.h>
  24 #include <command.h>
  25 #include <kgdb.h>
  26 #include <asm/processor.h>
  27
  28 DECLARE_GLOBAL_DATA_PTR;
  29
  30 /* Returns 0 if exception not found and fixup otherwise.  */
  31 extern unsigned long search_exception_table(unsigned long);
  32
  33 /*
  34  * End of addressable memory.  This may be less than the actual
  35  * amount of memory on the system if we're unable to keep all
  36  * the memory mapped in.
  37  */
  38 extern ulong get_effective_memsize(void);
  39 #define END_OF_MEM (gd->bd->bi_memstart + get_effective_memsize())
  40
  41 static __inline__ void set_tsr(unsigned long val)
  42 {
  43         asm volatile("mtspr 0x150, %0" : : "r" (val));
  44 }
  45
  46 static __inline__ unsigned long get_esr(void)
  47 {
  48         unsigned long val;
  49         asm volatile("mfspr %0, 0x03e" : "=r" (val) :);
  50         return val;
  51 }
  52
  53 #define ESR_MCI 0x80000000
  54 #define ESR_PIL 0x08000000
  55 #define ESR_PPR 0x04000000
  56 #define ESR_PTR 0x02000000
  57 #define ESR_DST 0x00800000
  58 #define ESR_DIZ 0x00400000
  59 #define ESR_U0F 0x00008000
  60
  61 #if defined(CONFIG_CMD_BEDBUG)
  62 extern void do_bedbug_breakpoint(struct pt_regs *);
  63 #endif
  64
  65 /*
  66  * Trap & Exception support
  67  */
  68
  69 static void print_backtrace(unsigned long *sp)
  70 {
  71         int cnt = 0;
  72         unsigned long i;
  73
  74         printf("Call backtrace: ");
  75         while (sp) {
  76                 if ((uint)sp > END_OF_MEM)
  77                         break;
  78
  79                 i = sp[1];
  80                 if (cnt++ % 7 == 0)
  81                         printf("\n");
  82                 printf("%08lX ", i);
  83                 if (cnt > 32) break;
  84                 sp = (unsigned long *)*sp;
  85         }
  86         printf("\n");
  87 }
  88
  89 void show_regs(struct pt_regs *regs)
  90 {
  91         int i;
  92
  93         printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
  94                regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
  95         printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
  96                regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
  97                regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
  98                regs->msr&MSR_IR ? 1 : 0,
  99                regs->msr&MSR_DR ? 1 : 0);
 100
 101         printf("\n");
 102         for (i = 0;  i < 32;  i++) {
 103                 if ((i % 8) == 0)
 104                 {
 105                         printf("GPR%02d: ", i);
 106                 }
 107
 108                 printf("%08lX ", regs->gpr[i]);
 109                 if ((i % 8) == 7)
 110                 {
 111                         printf("\n");
 112                 }
 113         }
 114 }
 115
 116
 117 static void _exception(int signr, struct pt_regs *regs)
 118 {
 119         show_regs(regs);
 120         print_backtrace((unsigned long *)regs->gpr[1]);
 121         panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
 122 }
 123
 124 void CritcalInputException(struct pt_regs *regs)
 125 {
 126         panic("Critical Input Exception");
 127 }
 128
 129 int machinecheck_count = 0;
 130 int machinecheck_error = 0;
 131 void MachineCheckException(struct pt_regs *regs)
 132 {
 133         unsigned long fixup;
 134         unsigned int mcsr, mcsrr0, mcsrr1, mcar;
 135
 136         /* Probing PCI using config cycles cause this exception
 137          * when a device is not present.  Catch it and return to
 138          * the PCI exception handler.
 139          */
 140         if ((fixup = search_exception_table(regs->nip)) != 0) {
 141                 regs->nip = fixup;
 142                 return;
 143         }
 144
 145         mcsrr0 = mfspr(SPRN_MCSRR0);
 146         mcsrr1 = mfspr(SPRN_MCSRR1);
 147         mcsr = mfspr(SPRN_MCSR);
 148         mcar = mfspr(SPRN_MCAR);
 149
 150         machinecheck_count++;
 151         machinecheck_error=1;
 152
 153 #if defined(CONFIG_CMD_KGDB)
 154         if (debugger_exception_handler && (*debugger_exception_handler)(regs))
 155                 return;
 156 #endif
 157
 158         printf("Machine check in kernel mode.\n");
 159         printf("Caused by (from mcsr): ");
 160         printf("mcsr = 0x%08x\n", mcsr);
 161         if (mcsr & 0x80000000)
 162                 printf("Machine check input pin\n");
 163         if (mcsr & 0x40000000)
 164                 printf("Instruction cache parity error\n");
 165         if (mcsr & 0x20000000)
 166                 printf("Data cache push parity error\n");
 167         if (mcsr & 0x10000000)
 168                 printf("Data cache parity error\n");
 169         if (mcsr & 0x00000080)
 170                 printf("Bus instruction address error\n");
 171         if (mcsr & 0x00000040)
 172                 printf("Bus Read address error\n");
 173         if (mcsr & 0x00000020)
 174                 printf("Bus Write address error\n");
 175         if (mcsr & 0x00000010)
 176                 printf("Bus Instruction data bus error\n");
 177         if (mcsr & 0x00000008)
 178                 printf("Bus Read data bus error\n");
 179         if (mcsr & 0x00000004)
 180                 printf("Bus Write bus error\n");
 181         if (mcsr & 0x00000002)
 182                 printf("Bus Instruction parity error\n");
 183         if (mcsr & 0x00000001)
 184                 printf("Bus Read parity error\n");
 185
 186         show_regs(regs);
 187         printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n",
 188                mcsr, mcsrr0, mcsrr1, mcar);
 189         print_backtrace((unsigned long *)regs->gpr[1]);
 190         if (machinecheck_count > 10) {
 191                 panic("machine check count too high\n");
 192         }
 193
 194         if (machinecheck_count > 1) {
 195                 regs->nip += 4; /* skip offending instruction */
 196                 printf("Skipping current instr, Returning to 0x%08lx\n",
 197                        regs->nip);
 198         } else {
 199                 printf("Returning back to 0x%08lx\n",regs->nip);
 200         }
 201 }
 202
 203 void AlignmentException(struct pt_regs *regs)
 204 {
 205 #if defined(CONFIG_CMD_KGDB)
 206         if (debugger_exception_handler && (*debugger_exception_handler)(regs))
 207                 return;
 208 #endif
 209
 210         show_regs(regs);
 211         print_backtrace((unsigned long *)regs->gpr[1]);
 212         panic("Alignment Exception");
 213 }
 214
 215 void ProgramCheckException(struct pt_regs *regs)
 216 {
 217         long esr_val;
 218
 219 #if defined(CONFIG_CMD_KGDB)
 220         if (debugger_exception_handler && (*debugger_exception_handler)(regs))
 221                 return;
 222 #endif
 223
 224         show_regs(regs);
 225
 226         esr_val = get_esr();
 227         if( esr_val & ESR_PIL )
 228                 printf( "** Illegal Instruction **\n" );
 229         else if( esr_val & ESR_PPR )
 230                 printf( "** Privileged Instruction **\n" );
 231         else if( esr_val & ESR_PTR )
 232                 printf( "** Trap Instruction **\n" );
 233
 234         print_backtrace((unsigned long *)regs->gpr[1]);
 235         panic("Program Check Exception");
 236 }
 237
 238 void PITException(struct pt_regs *regs)
 239 {
 240         /*
 241          * Reset PIT interrupt
 242          */
 243         set_tsr(0x0c000000);
 244
 245         /*
 246          * Call timer_interrupt routine in interrupts.c
 247          */
 248         timer_interrupt(NULL);
 249 }
 250
 251 void UnknownException(struct pt_regs *regs)
 252 {
 253 #if defined(CONFIG_CMD_KGDB)
 254         if (debugger_exception_handler && (*debugger_exception_handler)(regs))
 255                 return;
 256 #endif
 257
 258         printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
 259                regs->nip, regs->msr, regs->trap);
 260         _exception(0, regs);
 261 }
 262
 263 void ExtIntException(struct pt_regs *regs)
 264 {
 265         volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
 266
 267         uint vect;
 268
 269 #if defined(CONFIG_CMD_KGDB)
 270         if (debugger_exception_handler && (*debugger_exception_handler)(regs))
 271                 return;
 272 #endif
 273
 274         printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx",
 275                regs->nip, regs->msr, regs->trap);
 276         vect = pic->iack0;
 277         printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect);
 278         show_regs(regs);
 279         print_backtrace((unsigned long *)regs->gpr[1]);
 280 }
 281
 282 void DebugException(struct pt_regs *regs)
 283 {
 284         printf("Debugger trap at @ %lx\n", regs->nip );
 285         show_regs(regs);
 286 #if defined(CONFIG_CMD_BEDBUG)
 287         do_bedbug_breakpoint( regs );
 288 #endif
 289 }
 290
 291 /* Probe an address by reading.  If not present, return -1, otherwise
 292  * return 0.
 293  */
 294 int addr_probe(uint *addr)
 295 {
 296         return 0;
 297 }