arch/powerpc/cpu/mpc85xx/u-boot.lds

   1 /*
   2  * Copyright 2007-2009 Freescale Semiconductor, Inc.
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 #ifndef RESET_VECTOR_ADDRESS
  24 #define RESET_VECTOR_ADDRESS    0xfffffffc
  25 #endif
  26
  27 OUTPUT_ARCH(powerpc)
  28 /* Do we need any of these for elf?
  29    __DYNAMIC = 0;    */
  30 PHDRS
  31 {
  32   text PT_LOAD;
  33   bss PT_LOAD;
  34 }
  35
  36 SECTIONS
  37 {
  38   /* Read-only sections, merged into text segment: */
  39   . = + SIZEOF_HEADERS;
  40   .interp : { *(.interp) }
  41   .hash          : { *(.hash)           }
  42   .dynsym        : { *(.dynsym)         }
  43   .dynstr        : { *(.dynstr)         }
  44   .rel.text      : { *(.rel.text)               }
  45   .rela.text     : { *(.rela.text)      }
  46   .rel.data      : { *(.rel.data)               }
  47   .rela.data     : { *(.rela.data)      }
  48   .rel.rodata    : { *(.rel.rodata)     }
  49   .rela.rodata   : { *(.rela.rodata)    }
  50   .rel.got       : { *(.rel.got)                }
  51   .rela.got      : { *(.rela.got)               }
  52   .rel.ctors     : { *(.rel.ctors)      }
  53   .rela.ctors    : { *(.rela.ctors)     }
  54   .rel.dtors     : { *(.rel.dtors)      }
  55   .rela.dtors    : { *(.rela.dtors)     }
  56   .rel.bss       : { *(.rel.bss)                }
  57   .rela.bss      : { *(.rela.bss)               }
  58   .rel.plt       : { *(.rel.plt)                }
  59   .rela.plt      : { *(.rela.plt)               }
  60   .init          : { *(.init)   }
  61   .plt : { *(.plt) }
  62   .text      :
  63   {
  64     *(.text)
  65     *(.got1)
  66    } :text
  67     _etext = .;
  68     PROVIDE (etext = .);
  69     .rodata    :
  70    {
  71     *(.eh_frame)
  72     *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
  73   } :text
  74   .fini      : { *(.fini)    } =0
  75   .ctors     : { *(.ctors)   }
  76   .dtors     : { *(.dtors)   }
  77
  78   /* Read-write section, merged into data segment: */
  79   . = (. + 0x00FF) & 0xFFFFFF00;
  80   _erotext = .;
  81   PROVIDE (erotext = .);
  82   .reloc   :
  83   {
  84     *(.got)
  85     _GOT2_TABLE_ = .;
  86     *(.got2)
  87     _FIXUP_TABLE_ = .;
  88     *(.fixup)
  89   }
  90   __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
  91   __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
  92
  93   .data    :
  94   {
  95     *(.data)
  96     *(.data1)
  97     *(.sdata)
  98     *(.sdata2)
  99     *(.dynamic)
 100     CONSTRUCTORS
 101   }
 102   _edata  =  .;
 103   PROVIDE (edata = .);
 104
 105   . = .;
 106   __u_boot_cmd_start = .;
 107   .u_boot_cmd : { *(.u_boot_cmd) }
 108   __u_boot_cmd_end = .;
 109
 110   . = .;
 111   __start___ex_table = .;
 112   __ex_table : { *(__ex_table) }
 113   __stop___ex_table = .;
 114
 115   . = ALIGN(256);
 116   __init_begin = .;
 117   .text.init : { *(.text.init) }
 118   .data.init : { *(.data.init) }
 119   . = ALIGN(256);
 120   __init_end = .;
 121
 122   .bootpg RESET_VECTOR_ADDRESS - 0xffc :
 123   {
 124     arch/powerpc/cpu/mpc85xx/start.o    (.bootpg)
 125   } :text = 0xffff
 126
 127   .resetvec RESET_VECTOR_ADDRESS :
 128   {
 129     *(.resetvec)
 130   } :text = 0xffff
 131
 132   . = RESET_VECTOR_ADDRESS + 0x4;
 133
 134   /*
 135    * Make sure that the bss segment isn't linked at 0x0, otherwise its
 136    * address won't be updated during relocation fixups.  Note that
 137    * this is a temporary fix.  Code to dynamically the fixup the bss
 138    * location will be added in the future.  When the bss relocation
 139    * fixup code is present this workaround should be removed.
 140    */
 141 #if (RESET_VECTOR_ADDRESS == 0xfffffffc)
 142   . |= 0x10;
 143 #endif
 144
 145   __bss_start = .;
 146   .bss (NOLOAD)       :
 147   {
 148    *(.sbss) *(.scommon)
 149    *(.dynbss)
 150    *(.bss)
 151    *(COMMON)
 152   } :bss
 153
 154   . = ALIGN(4);
 155   _end = . ;
 156   PROVIDE (end = .);
 157 }