arch/powerpc/cpu/ppc4xx/interrupts.c

   1 /*
   2  * (C) Copyright 2000-2002
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * (C) Copyright 2002 (440 port)
   6  * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
   7  *
   8  * (C) Copyright 2003 (440GX port)
   9  * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
  10  *
  11  * (C) Copyright 2008 (PPC440X05 port for Virtex 5 FX)
  12  * Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com
  13  * Work supported by Qtechnology (htpp://qtec.com)
  14  *
  15  * SPDX-License-Identifier:     GPL-2.0+
  16  */
  17
  18 #include <common.h>
  19 #include <watchdog.h>
  20 #include <command.h>
  21 #include <asm/processor.h>
  22 #include <asm/interrupt.h>
  23 #include <asm/ppc4xx.h>
  24 #include <ppc_asm.tmpl>
  25
  26 DECLARE_GLOBAL_DATA_PTR;
  27
  28 /*
  29  * CPM interrupt vector functions.
  30  */
  31 struct  irq_action {
  32         interrupt_handler_t *handler;
  33         void *arg;
  34         int count;
  35 };
  36 static struct irq_action irq_vecs[IRQ_MAX];
  37
  38 #if defined(CONFIG_440)
  39
  40 /* SPRN changed in 440 */
  41 static __inline__ void set_evpr(unsigned long val)
  42 {
  43         asm volatile("mtspr 0x03f,%0" : : "r" (val));
  44 }
  45
  46 #else /* !defined(CONFIG_440) */
  47
  48 static __inline__ void set_pit(unsigned long val)
  49 {
  50         asm volatile("mtpit %0" : : "r" (val));
  51 }
  52
  53 static __inline__ void set_evpr(unsigned long val)
  54 {
  55         asm volatile("mtevpr %0" : : "r" (val));
  56 }
  57 #endif /* defined(CONFIG_440 */
  58
  59 int interrupt_init_cpu (unsigned *decrementer_count)
  60 {
  61         int vec;
  62         unsigned long val;
  63
  64         /* decrementer is automatically reloaded */
  65         *decrementer_count = 0;
  66
  67         /*
  68          * Mark all irqs as free
  69          */
  70         for (vec = 0; vec < IRQ_MAX; vec++) {
  71                 irq_vecs[vec].handler = NULL;
  72                 irq_vecs[vec].arg = NULL;
  73                 irq_vecs[vec].count = 0;
  74         }
  75
  76 #ifdef CONFIG_4xx
  77         /*
  78          * Init PIT
  79          */
  80 #if defined(CONFIG_440)
  81         val = mfspr( SPRN_TCR );
  82         val &= (~0x04400000);           /* clear DIS & ARE */
  83         mtspr( SPRN_TCR, val );
  84         mtspr( SPRN_DEC, 0 );           /* Prevent exception after TSR clear*/
  85         mtspr( SPRN_DECAR, 0 );         /* clear reload */
  86         mtspr( SPRN_TSR, 0x08000000 );  /* clear DEC status */
  87         val = gd->bd->bi_intfreq/1000;  /* 1 msec */
  88         mtspr( SPRN_DECAR, val );               /* Set auto-reload value */
  89         mtspr( SPRN_DEC, val );         /* Set inital val */
  90 #else
  91         set_pit(gd->bd->bi_intfreq / 1000);
  92 #endif
  93 #endif  /* CONFIG_4xx */
  94
  95 #ifdef CONFIG_ADCIOP
  96         /*
  97          * Init PIT
  98          */
  99         set_pit(66000);
 100 #endif
 101
 102         /*
 103          * Enable PIT
 104          */
 105         val = mfspr(SPRN_TCR);
 106         val |= 0x04400000;
 107         mtspr(SPRN_TCR, val);
 108
 109         /*
 110          * Set EVPR to 0
 111          */
 112         set_evpr(0x00000000);
 113
 114         /*
 115          * Call uic or xilinx_irq pic_enable
 116          */
 117         pic_enable();
 118
 119         return (0);
 120 }
 121
 122 void timer_interrupt_cpu(struct pt_regs *regs)
 123 {
 124         /* nothing to do here */
 125         return;
 126 }
 127
 128 void interrupt_run_handler(int vec)
 129 {
 130         irq_vecs[vec].count++;
 131
 132         if (irq_vecs[vec].handler != NULL) {
 133                 /* call isr */
 134                 (*irq_vecs[vec].handler) (irq_vecs[vec].arg);
 135         } else {
 136                 pic_irq_disable(vec);
 137                 printf("Masking bogus interrupt vector %d\n", vec);
 138         }
 139
 140         pic_irq_ack(vec);
 141         return;
 142 }
 143
 144 void irq_install_handler(int vec, interrupt_handler_t * handler, void *arg)
 145 {
 146         /*
 147          * Print warning when replacing with a different irq vector
 148          */
 149         if ((irq_vecs[vec].handler != NULL) && (irq_vecs[vec].handler != handler)) {
 150                 printf("Interrupt vector %d: handler 0x%x replacing 0x%x\n",
 151                        vec, (uint) handler, (uint) irq_vecs[vec].handler);
 152         }
 153         irq_vecs[vec].handler = handler;
 154         irq_vecs[vec].arg = arg;
 155
 156         pic_irq_enable(vec);
 157         return;
 158 }
 159
 160 void irq_free_handler(int vec)
 161 {
 162         debug("Free interrupt for vector %d ==> %p\n",
 163               vec, irq_vecs[vec].handler);
 164
 165         pic_irq_disable(vec);
 166
 167         irq_vecs[vec].handler = NULL;
 168         irq_vecs[vec].arg = NULL;
 169         return;
 170 }
 171
 172 #if defined(CONFIG_CMD_IRQ)
 173 int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 174 {
 175         int vec;
 176
 177         printf ("Interrupt-Information:\n");
 178         printf ("Nr  Routine   Arg       Count\n");
 179
 180         for (vec = 0; vec < IRQ_MAX; vec++) {
 181                 if (irq_vecs[vec].handler != NULL) {
 182                         printf ("%02d  %08lx  %08lx  %d\n",
 183                                 vec,
 184                                 (ulong)irq_vecs[vec].handler,
 185                                 (ulong)irq_vecs[vec].arg,
 186                                 irq_vecs[vec].count);
 187                 }
 188         }
 189
 190         return 0;
 191 }
 192 #endif