arch/powerpc/cpu/ppc4xx/u-boot.lds

   1 /*
   2  * Copyright 2007-2009 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include "config.h"     /* CONFIG_BOARDDIR */
   8
   9 #ifndef RESET_VECTOR_ADDRESS
  10 #ifdef CONFIG_RESET_VECTOR_ADDRESS
  11 #define RESET_VECTOR_ADDRESS    CONFIG_RESET_VECTOR_ADDRESS
  12 #else
  13 #define RESET_VECTOR_ADDRESS    0xfffffffc
  14 #endif
  15 #endif
  16
  17 OUTPUT_ARCH(powerpc)
  18
  19 PHDRS
  20 {
  21   text PT_LOAD;
  22   bss PT_LOAD;
  23 }
  24
  25 SECTIONS
  26 {
  27   /* Read-only sections, merged into text segment: */
  28   . = + SIZEOF_HEADERS;
  29   .text      :
  30   {
  31     *(.text*)
  32    } :text
  33     _etext = .;
  34     PROVIDE (etext = .);
  35     .rodata    :
  36    {
  37     *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
  38   } :text
  39
  40   /* Read-write section, merged into data segment: */
  41   . = (. + 0x00FF) & 0xFFFFFF00;
  42   _erotext = .;
  43   PROVIDE (erotext = .);
  44   .reloc   :
  45   {
  46     _GOT2_TABLE_ = .;
  47     KEEP(*(.got2))
  48     KEEP(*(.got))
  49     PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
  50     _FIXUP_TABLE_ = .;
  51     KEEP(*(.fixup))
  52   }
  53   __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
  54   __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
  55
  56   .data    :
  57   {
  58     *(.data*)
  59     *(.sdata*)
  60   }
  61   _edata  =  .;
  62   PROVIDE (edata = .);
  63
  64   . = .;
  65
  66   . = ALIGN(4);
  67   .u_boot_list : {
  68         KEEP(*(SORT(.u_boot_list*)));
  69   }
  70
  71   . = .;
  72   __start___ex_table = .;
  73   __ex_table : { *(__ex_table) }
  74   __stop___ex_table = .;
  75
  76   . = ALIGN(256);
  77   __init_begin = .;
  78   .text.init : { *(.text.init) }
  79   .data.init : { *(.data.init) }
  80   . = ALIGN(256);
  81   __init_end = .;
  82
  83 #ifndef CONFIG_SPL
  84 #ifdef CONFIG_440
  85   .bootpg RESET_VECTOR_ADDRESS - 0xffc :
  86   {
  87     arch/powerpc/cpu/ppc4xx/start.o     (.bootpg)
  88
  89     /*
  90      * PPC440 board need a board specific object with the
  91      * TLB definitions. This needs to get included right after
  92      * start.o, since the first shadow TLB only covers 4k
  93      * of address space.
  94      */
  95 #ifdef CONFIG_INIT_TLB
  96     CONFIG_INIT_TLB (.bootpg)
  97 #else
  98     CONFIG_BOARDDIR/init.o      (.bootpg)
  99 #endif
 100   } :text = 0xffff
 101 #endif
 102
 103   .resetvec RESET_VECTOR_ADDRESS :
 104   {
 105     KEEP(*(.resetvec))
 106   } :text = 0xffff
 107
 108   . = RESET_VECTOR_ADDRESS + 0x4;
 109
 110   /*
 111    * Make sure that the bss segment isn't linked at 0x0, otherwise its
 112    * address won't be updated during relocation fixups.  Note that
 113    * this is a temporary fix.  Code to dynamically the fixup the bss
 114    * location will be added in the future.  When the bss relocation
 115    * fixup code is present this workaround should be removed.
 116    */
 117 #if (RESET_VECTOR_ADDRESS == 0xfffffffc)
 118   . |= 0x10;
 119 #endif
 120 #endif /* CONFIG_SPL */
 121
 122   __bss_start = .;
 123   .bss (NOLOAD)       :
 124   {
 125    *(.bss*)
 126    *(.sbss*)
 127    *(COMMON)
 128   } :bss
 129
 130   . = ALIGN(4);
 131   __bss_end = . ;
 132   PROVIDE (end = .);
 133 }