]> git.ipfire.org Git - people/ms/u-boot.git/blob - arch/powerpc/cpu/ppc4xx/u-boot.lds
Merge branch 'microblaze' of git://www.denx.de/git/u-boot-microblaze
[people/ms/u-boot.git] / arch / powerpc / cpu / ppc4xx / u-boot.lds
1 /*
2 * Copyright 2007-2009 Freescale Semiconductor, Inc.
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23 #include "config.h" /* CONFIG_BOARDDIR */
24
25 #ifndef RESET_VECTOR_ADDRESS
26 #ifdef CONFIG_RESET_VECTOR_ADDRESS
27 #define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
28 #else
29 #define RESET_VECTOR_ADDRESS 0xfffffffc
30 #endif
31 #endif
32
33 OUTPUT_ARCH(powerpc)
34
35 PHDRS
36 {
37 text PT_LOAD;
38 bss PT_LOAD;
39 }
40
41 SECTIONS
42 {
43 /* Read-only sections, merged into text segment: */
44 . = + SIZEOF_HEADERS;
45 .text :
46 {
47 *(.text*)
48 } :text
49 _etext = .;
50 PROVIDE (etext = .);
51 .rodata :
52 {
53 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
54 } :text
55
56 /* Read-write section, merged into data segment: */
57 . = (. + 0x00FF) & 0xFFFFFF00;
58 _erotext = .;
59 PROVIDE (erotext = .);
60 .reloc :
61 {
62 _GOT2_TABLE_ = .;
63 KEEP(*(.got2))
64 KEEP(*(.got))
65 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
66 _FIXUP_TABLE_ = .;
67 KEEP(*(.fixup))
68 }
69 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
70 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
71
72 .data :
73 {
74 *(.data*)
75 *(.sdata*)
76 }
77 _edata = .;
78 PROVIDE (edata = .);
79
80 . = .;
81
82 . = ALIGN(4);
83 .u_boot_list : {
84 KEEP(*(SORT(.u_boot_list*)));
85 }
86
87 . = .;
88 __start___ex_table = .;
89 __ex_table : { *(__ex_table) }
90 __stop___ex_table = .;
91
92 . = ALIGN(256);
93 __init_begin = .;
94 .text.init : { *(.text.init) }
95 .data.init : { *(.data.init) }
96 . = ALIGN(256);
97 __init_end = .;
98
99 #ifndef CONFIG_SPL
100 #ifdef CONFIG_440
101 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
102 {
103 arch/powerpc/cpu/ppc4xx/start.o (.bootpg)
104
105 /*
106 * PPC440 board need a board specific object with the
107 * TLB definitions. This needs to get included right after
108 * start.o, since the first shadow TLB only covers 4k
109 * of address space.
110 */
111 #ifdef CONFIG_INIT_TLB
112 CONFIG_INIT_TLB (.bootpg)
113 #else
114 CONFIG_BOARDDIR/init.o (.bootpg)
115 #endif
116 } :text = 0xffff
117 #endif
118
119 .resetvec RESET_VECTOR_ADDRESS :
120 {
121 KEEP(*(.resetvec))
122 } :text = 0xffff
123
124 . = RESET_VECTOR_ADDRESS + 0x4;
125
126 /*
127 * Make sure that the bss segment isn't linked at 0x0, otherwise its
128 * address won't be updated during relocation fixups. Note that
129 * this is a temporary fix. Code to dynamically the fixup the bss
130 * location will be added in the future. When the bss relocation
131 * fixup code is present this workaround should be removed.
132 */
133 #if (RESET_VECTOR_ADDRESS == 0xfffffffc)
134 . |= 0x10;
135 #endif
136 #endif /* CONFIG_SPL */
137
138 __bss_start = .;
139 .bss (NOLOAD) :
140 {
141 *(.bss*)
142 *(.sbss*)
143 *(COMMON)
144 } :bss
145
146 . = ALIGN(4);
147 __bss_end = . ;
148 PROVIDE (end = .);
149 }