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[people/ms/u-boot.git] / arch / powerpc / cpu / ppc4xx / usb_ohci.c
1 /*
2 * URB OHCI HCD (Host Controller Driver) for USB on the PPC440EP.
3 *
4 * (C) Copyright 2003-2004
5 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
6 *
7 * (C) Copyright 2004
8 * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
9 *
10 * Note: Much of this code has been derived from Linux 2.4
11 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
12 * (C) Copyright 2000-2002 David Brownell
13 *
14 * SPDX-License-Identifier: GPL-2.0+
15 */
16 /*
17 * IMPORTANT NOTES
18 * 1 - this driver is intended for use with USB Mass Storage Devices
19 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
20 */
21
22 #include <common.h>
23
24 #ifdef CONFIG_USB_OHCI
25
26 #include <malloc.h>
27 #include <usb.h>
28 #include "usb_ohci.h"
29
30 #define OHCI_USE_NPS /* force NoPowerSwitching mode */
31 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
32 #undef DEBUG
33 #undef SHOW_INFO
34 #undef OHCI_FILL_TRACE
35
36 /* For initializing controller (mask in an HCFS mode too) */
37 #define OHCI_CONTROL_INIT \
38 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
39
40 #define readl(a) (*((volatile u32 *)(a)))
41 #define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
42
43 #ifdef DEBUG
44 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
45 #else
46 #define dbg(format, arg...) do {} while(0)
47 #endif /* DEBUG */
48 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
49 #ifdef SHOW_INFO
50 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
51 #else
52 #define info(format, arg...) do {} while(0)
53 #endif
54
55 #define m16_swap(x) swap_16(x)
56 #define m32_swap(x) swap_32(x)
57
58 #if defined(CONFIG_405EZ) || defined(CONFIG_440EP) || defined(CONFIG_440EPX)
59 #define ohci_cpu_to_le16(x) (x)
60 #define ohci_cpu_to_le32(x) (x)
61 #else
62 #define ohci_cpu_to_le16(x) swap_16(x)
63 #define ohci_cpu_to_le32(x) swap_32(x)
64 #endif
65
66 /* global ohci_t */
67 static ohci_t gohci;
68 /* this must be aligned to a 256 byte boundary */
69 struct ohci_hcca ghcca[1];
70 /* a pointer to the aligned storage */
71 struct ohci_hcca *phcca;
72 /* this allocates EDs for all possible endpoints */
73 struct ohci_device ohci_dev;
74 /* urb_priv */
75 urb_priv_t urb_priv;
76 /* RHSC flag */
77 int got_rhsc;
78 /* device which was disconnected */
79 struct usb_device *devgone;
80 /* flag guarding URB transation */
81 int urb_finished = 0;
82
83 /*-------------------------------------------------------------------------*/
84
85 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
86 * The erratum (#4) description is incorrect. AMD's workaround waits
87 * till some bits (mostly reserved) are clear; ok for all revs.
88 */
89 #define OHCI_QUIRK_AMD756 0xabcd
90 #define read_roothub(hc, register, mask) ({ \
91 u32 temp = readl (&hc->regs->roothub.register); \
92 if (hc->flags & OHCI_QUIRK_AMD756) \
93 while (temp & mask) \
94 temp = readl (&hc->regs->roothub.register); \
95 temp; })
96
97 static u32 roothub_a (struct ohci *hc)
98 { return read_roothub (hc, a, 0xfc0fe000); }
99 static inline u32 roothub_b (struct ohci *hc)
100 { return readl (&hc->regs->roothub.b); }
101 static inline u32 roothub_status (struct ohci *hc)
102 { return readl (&hc->regs->roothub.status); }
103 static u32 roothub_portstatus (struct ohci *hc, int i)
104 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
105
106
107 /* forward declaration */
108 static int hc_interrupt (void);
109 static void
110 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
111 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
112
113 /*-------------------------------------------------------------------------*
114 * URB support functions
115 *-------------------------------------------------------------------------*/
116
117 /* free HCD-private data associated with this URB */
118
119 static void urb_free_priv (urb_priv_t * urb)
120 {
121 int i;
122 int last;
123 struct td * td;
124
125 last = urb->length - 1;
126 if (last >= 0) {
127 for (i = 0; i <= last; i++) {
128 td = urb->td[i];
129 if (td) {
130 td->usb_dev = NULL;
131 urb->td[i] = NULL;
132 }
133 }
134 }
135 }
136
137 /*-------------------------------------------------------------------------*/
138
139 #ifdef DEBUG
140 static int sohci_get_current_frame_number (struct usb_device * dev);
141
142 /* debug| print the main components of an URB
143 * small: 0) header + data packets 1) just header */
144
145 static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
146 int transfer_len, struct devrequest * setup, char * str, int small)
147 {
148 urb_priv_t * purb = &urb_priv;
149
150 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
151 str,
152 sohci_get_current_frame_number (dev),
153 usb_pipedevice (pipe),
154 usb_pipeendpoint (pipe),
155 usb_pipeout (pipe)? 'O': 'I',
156 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
157 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
158 purb->actual_length,
159 transfer_len, dev->status);
160 #ifdef OHCI_VERBOSE_DEBUG
161 if (!small) {
162 int i, len;
163
164 if (usb_pipecontrol (pipe)) {
165 printf (__FILE__ ": cmd(8):");
166 for (i = 0; i < 8 ; i++)
167 printf (" %02x", ((__u8 *) setup) [i]);
168 printf ("\n");
169 }
170 if (transfer_len > 0 && buffer) {
171 printf (__FILE__ ": data(%d/%d):",
172 purb->actual_length,
173 transfer_len);
174 len = usb_pipeout (pipe)?
175 transfer_len: purb->actual_length;
176 for (i = 0; i < 16 && i < len; i++)
177 printf (" %02x", ((__u8 *) buffer) [i]);
178 printf ("%s\n", i < len? "...": "");
179 }
180 }
181 #endif
182 }
183
184 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
185 void ep_print_int_eds (ohci_t *ohci, char * str) {
186 int i, j;
187 __u32 * ed_p;
188 for (i= 0; i < 32; i++) {
189 j = 5;
190 ed_p = &(ohci->hcca->int_table [i]);
191 if (*ed_p == 0)
192 continue;
193 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
194 while (*ed_p != 0 && j--) {
195 ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
196 printf (" ed: %4x;", ed->hwINFO);
197 ed_p = &ed->hwNextED;
198 }
199 printf ("\n");
200 }
201 }
202
203 static void ohci_dump_intr_mask (char *label, __u32 mask)
204 {
205 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
206 label,
207 mask,
208 (mask & OHCI_INTR_MIE) ? " MIE" : "",
209 (mask & OHCI_INTR_OC) ? " OC" : "",
210 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
211 (mask & OHCI_INTR_FNO) ? " FNO" : "",
212 (mask & OHCI_INTR_UE) ? " UE" : "",
213 (mask & OHCI_INTR_RD) ? " RD" : "",
214 (mask & OHCI_INTR_SF) ? " SF" : "",
215 (mask & OHCI_INTR_WDH) ? " WDH" : "",
216 (mask & OHCI_INTR_SO) ? " SO" : ""
217 );
218 }
219
220 static void maybe_print_eds (char *label, __u32 value)
221 {
222 ed_t *edp = (ed_t *)value;
223
224 if (value) {
225 dbg ("%s %08x", label, value);
226 dbg ("%08x", edp->hwINFO);
227 dbg ("%08x", edp->hwTailP);
228 dbg ("%08x", edp->hwHeadP);
229 dbg ("%08x", edp->hwNextED);
230 }
231 }
232
233 static char * hcfs2string (int state)
234 {
235 switch (state) {
236 case OHCI_USB_RESET: return "reset";
237 case OHCI_USB_RESUME: return "resume";
238 case OHCI_USB_OPER: return "operational";
239 case OHCI_USB_SUSPEND: return "suspend";
240 }
241 return "?";
242 }
243
244 /* dump control and status registers */
245 static void ohci_dump_status (ohci_t *controller)
246 {
247 struct ohci_regs *regs = controller->regs;
248 __u32 temp;
249
250 temp = readl (&regs->revision) & 0xff;
251 if (temp != 0x10)
252 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
253
254 temp = readl (&regs->control);
255 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
256 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
257 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
258 (temp & OHCI_CTRL_IR) ? " IR" : "",
259 hcfs2string (temp & OHCI_CTRL_HCFS),
260 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
261 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
262 (temp & OHCI_CTRL_IE) ? " IE" : "",
263 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
264 temp & OHCI_CTRL_CBSR
265 );
266
267 temp = readl (&regs->cmdstatus);
268 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
269 (temp & OHCI_SOC) >> 16,
270 (temp & OHCI_OCR) ? " OCR" : "",
271 (temp & OHCI_BLF) ? " BLF" : "",
272 (temp & OHCI_CLF) ? " CLF" : "",
273 (temp & OHCI_HCR) ? " HCR" : ""
274 );
275
276 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
277 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
278
279 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
280
281 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
282 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
283
284 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
285 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
286
287 maybe_print_eds ("donehead", readl (&regs->donehead));
288 }
289
290 static void ohci_dump_roothub (ohci_t *controller, int verbose)
291 {
292 __u32 temp, ndp, i;
293
294 temp = roothub_a (controller);
295 ndp = (temp & RH_A_NDP);
296
297 if (verbose) {
298 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
299 ((temp & RH_A_POTPGT) >> 24) & 0xff,
300 (temp & RH_A_NOCP) ? " NOCP" : "",
301 (temp & RH_A_OCPM) ? " OCPM" : "",
302 (temp & RH_A_DT) ? " DT" : "",
303 (temp & RH_A_NPS) ? " NPS" : "",
304 (temp & RH_A_PSM) ? " PSM" : "",
305 ndp
306 );
307 temp = roothub_b (controller);
308 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
309 temp,
310 (temp & RH_B_PPCM) >> 16,
311 (temp & RH_B_DR)
312 );
313 temp = roothub_status (controller);
314 dbg ("roothub.status: %08x%s%s%s%s%s%s",
315 temp,
316 (temp & RH_HS_CRWE) ? " CRWE" : "",
317 (temp & RH_HS_OCIC) ? " OCIC" : "",
318 (temp & RH_HS_LPSC) ? " LPSC" : "",
319 (temp & RH_HS_DRWE) ? " DRWE" : "",
320 (temp & RH_HS_OCI) ? " OCI" : "",
321 (temp & RH_HS_LPS) ? " LPS" : ""
322 );
323 }
324
325 for (i = 0; i < ndp; i++) {
326 temp = roothub_portstatus (controller, i);
327 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
328 i,
329 temp,
330 (temp & RH_PS_PRSC) ? " PRSC" : "",
331 (temp & RH_PS_OCIC) ? " OCIC" : "",
332 (temp & RH_PS_PSSC) ? " PSSC" : "",
333 (temp & RH_PS_PESC) ? " PESC" : "",
334 (temp & RH_PS_CSC) ? " CSC" : "",
335
336 (temp & RH_PS_LSDA) ? " LSDA" : "",
337 (temp & RH_PS_PPS) ? " PPS" : "",
338 (temp & RH_PS_PRS) ? " PRS" : "",
339 (temp & RH_PS_POCI) ? " POCI" : "",
340 (temp & RH_PS_PSS) ? " PSS" : "",
341
342 (temp & RH_PS_PES) ? " PES" : "",
343 (temp & RH_PS_CCS) ? " CCS" : ""
344 );
345 }
346 }
347
348 static void ohci_dump (ohci_t *controller, int verbose)
349 {
350 dbg ("OHCI controller usb-%s state", controller->slot_name);
351
352 /* dumps some of the state we know about */
353 ohci_dump_status (controller);
354 if (verbose)
355 ep_print_int_eds (controller, "hcca");
356 dbg ("hcca frame #%04x", controller->hcca->frame_no);
357 ohci_dump_roothub (controller, 1);
358 }
359
360
361 #endif /* DEBUG */
362
363 /*-------------------------------------------------------------------------*
364 * Interface functions (URB)
365 *-------------------------------------------------------------------------*/
366
367 /* get a transfer request */
368
369 int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
370 int transfer_len, struct devrequest *setup, int interval)
371 {
372 ohci_t *ohci;
373 ed_t * ed;
374 urb_priv_t *purb_priv;
375 int i, size = 0;
376
377 ohci = &gohci;
378
379 /* when controller's hung, permit only roothub cleanup attempts
380 * such as powering down ports */
381 if (ohci->disabled) {
382 err("sohci_submit_job: EPIPE");
383 return -1;
384 }
385
386 /* if we have an unfinished URB from previous transaction let's
387 * fail and scream as quickly as possible so as not to corrupt
388 * further communication */
389 if (!urb_finished) {
390 err("sohci_submit_job: URB NOT FINISHED");
391 return -1;
392 }
393 /* we're about to begin a new transaction here so mark the URB unfinished */
394 urb_finished = 0;
395
396 /* every endpoint has a ed, locate and fill it */
397 if (!(ed = ep_add_ed (dev, pipe))) {
398 err("sohci_submit_job: ENOMEM");
399 return -1;
400 }
401
402 /* for the private part of the URB we need the number of TDs (size) */
403 switch (usb_pipetype (pipe)) {
404 case PIPE_BULK: /* one TD for every 4096 Byte */
405 size = (transfer_len - 1) / 4096 + 1;
406 break;
407 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
408 size = (transfer_len == 0)? 2:
409 (transfer_len - 1) / 4096 + 3;
410 break;
411 }
412
413 if (size >= (N_URB_TD - 1)) {
414 err("need %d TDs, only have %d", size, N_URB_TD);
415 return -1;
416 }
417 purb_priv = &urb_priv;
418 purb_priv->pipe = pipe;
419
420 /* fill the private part of the URB */
421 purb_priv->length = size;
422 purb_priv->ed = ed;
423 purb_priv->actual_length = 0;
424
425 /* allocate the TDs */
426 /* note that td[0] was allocated in ep_add_ed */
427 for (i = 0; i < size; i++) {
428 purb_priv->td[i] = td_alloc (dev);
429 if (!purb_priv->td[i]) {
430 purb_priv->length = i;
431 urb_free_priv (purb_priv);
432 err("sohci_submit_job: ENOMEM");
433 return -1;
434 }
435 }
436
437 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
438 urb_free_priv (purb_priv);
439 err("sohci_submit_job: EINVAL");
440 return -1;
441 }
442
443 /* link the ed into a chain if is not already */
444 if (ed->state != ED_OPER)
445 ep_link (ohci, ed);
446
447 /* fill the TDs and link it to the ed */
448 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
449
450 return 0;
451 }
452
453 /*-------------------------------------------------------------------------*/
454
455 #ifdef DEBUG
456 /* tell us the current USB frame number */
457
458 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
459 {
460 ohci_t *ohci = &gohci;
461
462 return ohci_cpu_to_le16 (ohci->hcca->frame_no);
463 }
464 #endif
465
466 /*-------------------------------------------------------------------------*
467 * ED handling functions
468 *-------------------------------------------------------------------------*/
469
470 /* link an ed into one of the HC chains */
471
472 static int ep_link (ohci_t *ohci, ed_t *edi)
473 {
474 volatile ed_t *ed = edi;
475
476 ed->state = ED_OPER;
477
478 switch (ed->type) {
479 case PIPE_CONTROL:
480 ed->hwNextED = 0;
481 if (ohci->ed_controltail == NULL) {
482 writel (ed, &ohci->regs->ed_controlhead);
483 } else {
484 ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
485 }
486 ed->ed_prev = ohci->ed_controltail;
487 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
488 !ohci->ed_rm_list[1] && !ohci->sleeping) {
489 ohci->hc_control |= OHCI_CTRL_CLE;
490 writel (ohci->hc_control, &ohci->regs->control);
491 }
492 ohci->ed_controltail = edi;
493 break;
494
495 case PIPE_BULK:
496 ed->hwNextED = 0;
497 if (ohci->ed_bulktail == NULL) {
498 writel (ed, &ohci->regs->ed_bulkhead);
499 } else {
500 ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
501 }
502 ed->ed_prev = ohci->ed_bulktail;
503 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
504 !ohci->ed_rm_list[1] && !ohci->sleeping) {
505 ohci->hc_control |= OHCI_CTRL_BLE;
506 writel (ohci->hc_control, &ohci->regs->control);
507 }
508 ohci->ed_bulktail = edi;
509 break;
510 }
511 return 0;
512 }
513
514 /*-------------------------------------------------------------------------*/
515
516 /* unlink an ed from one of the HC chains.
517 * just the link to the ed is unlinked.
518 * the link from the ed still points to another operational ed or 0
519 * so the HC can eventually finish the processing of the unlinked ed */
520
521 static int ep_unlink (ohci_t *ohci, ed_t *edi)
522 {
523 volatile ed_t *ed = edi;
524
525 ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
526
527 switch (ed->type) {
528 case PIPE_CONTROL:
529 if (ed->ed_prev == NULL) {
530 if (!ed->hwNextED) {
531 ohci->hc_control &= ~OHCI_CTRL_CLE;
532 writel (ohci->hc_control, &ohci->regs->control);
533 }
534 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
535 } else {
536 ed->ed_prev->hwNextED = ed->hwNextED;
537 }
538 if (ohci->ed_controltail == ed) {
539 ohci->ed_controltail = ed->ed_prev;
540 } else {
541 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
542 }
543 break;
544
545 case PIPE_BULK:
546 if (ed->ed_prev == NULL) {
547 if (!ed->hwNextED) {
548 ohci->hc_control &= ~OHCI_CTRL_BLE;
549 writel (ohci->hc_control, &ohci->regs->control);
550 }
551 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
552 } else {
553 ed->ed_prev->hwNextED = ed->hwNextED;
554 }
555 if (ohci->ed_bulktail == ed) {
556 ohci->ed_bulktail = ed->ed_prev;
557 } else {
558 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
559 }
560 break;
561 }
562 ed->state = ED_UNLINK;
563 return 0;
564 }
565
566
567 /*-------------------------------------------------------------------------*/
568
569 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
570 * but the USB stack is a little bit stateless so we do it at every transaction
571 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
572 * in all other cases the state is left unchanged
573 * the ed info fields are setted anyway even though most of them should not change */
574
575 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
576 {
577 td_t *td;
578 ed_t *ed_ret;
579 volatile ed_t *ed;
580
581 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
582 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
583
584 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
585 err("ep_add_ed: pending delete");
586 /* pending delete request */
587 return NULL;
588 }
589
590 if (ed->state == ED_NEW) {
591 ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
592 /* dummy td; end of td list for ed */
593 td = td_alloc (usb_dev);
594 ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
595 ed->hwHeadP = ed->hwTailP;
596 ed->state = ED_UNLINK;
597 ed->type = usb_pipetype (pipe);
598 ohci_dev.ed_cnt++;
599 }
600
601 ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
602 | usb_pipeendpoint (pipe) << 7
603 | (usb_pipeisoc (pipe)? 0x8000: 0)
604 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
605 | (usb_dev->speed == USB_SPEED_LOW) << 13
606 | usb_maxpacket (usb_dev, pipe) << 16);
607
608 return ed_ret;
609 }
610
611 /*-------------------------------------------------------------------------*
612 * TD handling functions
613 *-------------------------------------------------------------------------*/
614
615 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
616
617 static void td_fill (ohci_t *ohci, unsigned int info,
618 void *data, int len,
619 struct usb_device *dev, int index, urb_priv_t *urb_priv)
620 {
621 volatile td_t *td, *td_pt;
622 #ifdef OHCI_FILL_TRACE
623 int i;
624 #endif
625
626 if (index > urb_priv->length) {
627 err("index > length");
628 return;
629 }
630 /* use this td as the next dummy */
631 td_pt = urb_priv->td [index];
632 td_pt->hwNextTD = 0;
633
634 /* fill the old dummy TD */
635 td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
636
637 td->ed = urb_priv->ed;
638 td->next_dl_td = NULL;
639 td->index = index;
640 td->data = (__u32)data;
641 #ifdef OHCI_FILL_TRACE
642 if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
643 for (i = 0; i < len; i++)
644 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
645 printf("\n");
646 }
647 #endif
648 if (!len)
649 data = 0;
650
651 td->hwINFO = ohci_cpu_to_le32 (info);
652 td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
653 if (data)
654 td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
655 else
656 td->hwBE = 0;
657 td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
658
659 /* append to queue */
660 td->ed->hwTailP = td->hwNextTD;
661 }
662
663 /*-------------------------------------------------------------------------*/
664
665 /* prepare all TDs of a transfer */
666 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
667 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
668 {
669 ohci_t *ohci = &gohci;
670 int data_len = transfer_len;
671 void *data;
672 int cnt = 0;
673 __u32 info = 0;
674 unsigned int toggle = 0;
675
676 /* OHCI handles the DATA-toggles itself, we just use the
677 USB-toggle bits for resetting */
678 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
679 toggle = TD_T_TOGGLE;
680 } else {
681 toggle = TD_T_DATA0;
682 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
683 }
684 urb->td_cnt = 0;
685 if (data_len)
686 data = buffer;
687 else
688 data = 0;
689
690 switch (usb_pipetype (pipe)) {
691 case PIPE_BULK:
692 info = usb_pipeout (pipe)?
693 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
694 while(data_len > 4096) {
695 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
696 data += 4096; data_len -= 4096; cnt++;
697 }
698 info = usb_pipeout (pipe)?
699 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
700 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
701 cnt++;
702
703 if (!ohci->sleeping)
704 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
705 break;
706
707 case PIPE_CONTROL:
708 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
709 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
710 if (data_len > 0) {
711 info = usb_pipeout (pipe)?
712 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
713 /* NOTE: mishandles transfers >8K, some >4K */
714 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
715 }
716 info = usb_pipeout (pipe)?
717 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
718 td_fill (ohci, info, data, 0, dev, cnt++, urb);
719 if (!ohci->sleeping)
720 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
721 break;
722 }
723 if (urb->length != cnt)
724 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
725 }
726
727 /*-------------------------------------------------------------------------*
728 * Done List handling functions
729 *-------------------------------------------------------------------------*/
730
731
732 /* calculate the transfer length and update the urb */
733
734 static void dl_transfer_length(td_t * td)
735 {
736 __u32 tdBE, tdCBP;
737 urb_priv_t *lurb_priv = &urb_priv;
738
739 tdBE = ohci_cpu_to_le32 (td->hwBE);
740 tdCBP = ohci_cpu_to_le32 (td->hwCBP);
741
742
743 if (!(usb_pipecontrol(lurb_priv->pipe) &&
744 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
745 if (tdBE != 0) {
746 if (td->hwCBP == 0)
747 lurb_priv->actual_length += tdBE - td->data + 1;
748 else
749 lurb_priv->actual_length += tdCBP - td->data;
750 }
751 }
752 }
753
754 /*-------------------------------------------------------------------------*/
755
756 /* replies to the request have to be on a FIFO basis so
757 * we reverse the reversed done-list */
758
759 static td_t * dl_reverse_done_list (ohci_t *ohci)
760 {
761 __u32 td_list_hc;
762 td_t *td_rev = NULL;
763 td_t *td_list = NULL;
764 urb_priv_t *lurb_priv = NULL;
765
766 td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
767 ohci->hcca->done_head = 0;
768
769 while (td_list_hc) {
770 td_list = (td_t *)td_list_hc;
771
772 if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
773 lurb_priv = &urb_priv;
774 dbg(" USB-error/status: %x : %p",
775 TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
776 if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
777 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
778 td_list->ed->hwHeadP =
779 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
780 (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
781 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
782 } else
783 td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
784 }
785 }
786
787 td_list->next_dl_td = td_rev;
788 td_rev = td_list;
789 td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
790 }
791 return td_list;
792 }
793
794 /*-------------------------------------------------------------------------*/
795
796 /* td done list */
797 static int dl_done_list (ohci_t *ohci, td_t *td_list)
798 {
799 td_t *td_list_next = NULL;
800 ed_t *ed;
801 int cc = 0;
802 int stat = 0;
803 /* urb_t *urb; */
804 urb_priv_t *lurb_priv;
805 __u32 tdINFO, edHeadP, edTailP;
806
807 while (td_list) {
808 td_list_next = td_list->next_dl_td;
809
810 lurb_priv = &urb_priv;
811 tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
812
813 ed = td_list->ed;
814
815 dl_transfer_length(td_list);
816
817 /* error code of transfer */
818 cc = TD_CC_GET (tdINFO);
819 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
820 if ((ed->state & (ED_OPER | ED_UNLINK))
821 && (lurb_priv->state != URB_DEL)) {
822 dbg("ConditionCode %#x", cc);
823 stat = cc_to_error[cc];
824 urb_finished = 1;
825 }
826 }
827
828 if (ed->state != ED_NEW) {
829 edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
830 edTailP = ohci_cpu_to_le32 (ed->hwTailP);
831
832 /* unlink eds if they are not busy */
833 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
834 ep_unlink (ohci, ed);
835 }
836
837 td_list = td_list_next;
838 }
839 return stat;
840 }
841
842 /*-------------------------------------------------------------------------*
843 * Virtual Root Hub
844 *-------------------------------------------------------------------------*/
845
846 #include <usbroothubdes.h>
847
848 /* Hub class-specific descriptor is constructed dynamically */
849
850
851 /*-------------------------------------------------------------------------*/
852
853 #define OK(x) len = (x); break
854 #ifdef DEBUG
855 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
856 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
857 #else
858 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
859 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
860 #endif
861 #define RD_RH_STAT roothub_status(&gohci)
862 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
863
864 /* request to virtual root hub */
865
866 int rh_check_port_status(ohci_t *controller)
867 {
868 __u32 temp, ndp, i;
869 int res;
870
871 res = -1;
872 temp = roothub_a (controller);
873 ndp = (temp & RH_A_NDP);
874 for (i = 0; i < ndp; i++) {
875 temp = roothub_portstatus (controller, i);
876 /* check for a device disconnect */
877 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
878 (RH_PS_PESC | RH_PS_CSC)) &&
879 ((temp & RH_PS_CCS) == 0)) {
880 res = i;
881 break;
882 }
883 }
884 return res;
885 }
886
887 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
888 void *buffer, int transfer_len, struct devrequest *cmd)
889 {
890 void * data = buffer;
891 int leni = transfer_len;
892 int len = 0;
893 int stat = 0;
894 __u32 datab[4];
895 __u8 *data_buf = (__u8 *)datab;
896 __u16 bmRType_bReq;
897 __u16 wValue;
898 __u16 wIndex;
899 __u16 wLength;
900
901 #ifdef DEBUG
902 urb_priv.actual_length = 0;
903 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
904 #endif
905 if (usb_pipeint(pipe)) {
906 info("Root-Hub submit IRQ: NOT implemented");
907 return 0;
908 }
909
910 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
911 wValue = m16_swap (cmd->value);
912 wIndex = m16_swap (cmd->index);
913 wLength = m16_swap (cmd->length);
914
915 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
916 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
917
918 switch (bmRType_bReq) {
919 /* Request Destination:
920 without flags: Device,
921 RH_INTERFACE: interface,
922 RH_ENDPOINT: endpoint,
923 RH_CLASS means HUB here,
924 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
925 */
926
927 case RH_GET_STATUS:
928 *(__u16 *) data_buf = m16_swap (1); OK (2);
929 case RH_GET_STATUS | RH_INTERFACE:
930 *(__u16 *) data_buf = m16_swap (0); OK (2);
931 case RH_GET_STATUS | RH_ENDPOINT:
932 *(__u16 *) data_buf = m16_swap (0); OK (2);
933 case RH_GET_STATUS | RH_CLASS:
934 *(__u32 *) data_buf = m32_swap (
935 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
936 OK (4);
937 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
938 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
939
940 case RH_CLEAR_FEATURE | RH_ENDPOINT:
941 switch (wValue) {
942 case (RH_ENDPOINT_STALL): OK (0);
943 }
944 break;
945
946 case RH_CLEAR_FEATURE | RH_CLASS:
947 switch (wValue) {
948 case RH_C_HUB_LOCAL_POWER:
949 OK(0);
950 case (RH_C_HUB_OVER_CURRENT):
951 WR_RH_STAT(RH_HS_OCIC); OK (0);
952 }
953 break;
954
955 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
956 switch (wValue) {
957 case (RH_PORT_ENABLE):
958 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
959 case (RH_PORT_SUSPEND):
960 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
961 case (RH_PORT_POWER):
962 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
963 case (RH_C_PORT_CONNECTION):
964 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
965 case (RH_C_PORT_ENABLE):
966 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
967 case (RH_C_PORT_SUSPEND):
968 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
969 case (RH_C_PORT_OVER_CURRENT):
970 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
971 case (RH_C_PORT_RESET):
972 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
973 }
974 break;
975
976 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
977 switch (wValue) {
978 case (RH_PORT_SUSPEND):
979 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
980 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
981 if (RD_RH_PORTSTAT & RH_PS_CCS)
982 WR_RH_PORTSTAT (RH_PS_PRS);
983 OK (0);
984 case (RH_PORT_POWER):
985 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
986 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
987 if (RD_RH_PORTSTAT & RH_PS_CCS)
988 WR_RH_PORTSTAT (RH_PS_PES );
989 OK (0);
990 }
991 break;
992
993 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
994
995 case RH_GET_DESCRIPTOR:
996 switch ((wValue & 0xff00) >> 8) {
997 case (0x01): /* device descriptor */
998 len = min_t(unsigned int,
999 leni,
1000 min_t(unsigned int,
1001 sizeof (root_hub_dev_des),
1002 wLength));
1003 data_buf = root_hub_dev_des; OK(len);
1004 case (0x02): /* configuration descriptor */
1005 len = min_t(unsigned int,
1006 leni,
1007 min_t(unsigned int,
1008 sizeof (root_hub_config_des),
1009 wLength));
1010 data_buf = root_hub_config_des; OK(len);
1011 case (0x03): /* string descriptors */
1012 if(wValue==0x0300) {
1013 len = min_t(unsigned int,
1014 leni,
1015 min_t(unsigned int,
1016 sizeof (root_hub_str_index0),
1017 wLength));
1018 data_buf = root_hub_str_index0;
1019 OK(len);
1020 }
1021 if(wValue==0x0301) {
1022 len = min_t(unsigned int,
1023 leni,
1024 min_t(unsigned int,
1025 sizeof (root_hub_str_index1),
1026 wLength));
1027 data_buf = root_hub_str_index1;
1028 OK(len);
1029 }
1030 default:
1031 stat = USB_ST_STALLED;
1032 }
1033 break;
1034
1035 case RH_GET_DESCRIPTOR | RH_CLASS:
1036 {
1037 __u32 temp = roothub_a (&gohci);
1038
1039 data_buf [0] = 9; /* min length; */
1040 data_buf [1] = 0x29;
1041 data_buf [2] = temp & RH_A_NDP;
1042 data_buf [3] = 0;
1043 if (temp & RH_A_PSM) /* per-port power switching? */
1044 data_buf [3] |= 0x1;
1045 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1046 data_buf [3] |= 0x10;
1047 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1048 data_buf [3] |= 0x8;
1049
1050 /* corresponds to data_buf[4-7] */
1051 datab [1] = 0;
1052 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1053 temp = roothub_b (&gohci);
1054 data_buf [7] = temp & RH_B_DR;
1055 if (data_buf [2] < 7) {
1056 data_buf [8] = 0xff;
1057 } else {
1058 data_buf [0] += 2;
1059 data_buf [8] = (temp & RH_B_DR) >> 8;
1060 data_buf [10] = data_buf [9] = 0xff;
1061 }
1062
1063 len = min_t(unsigned int, leni,
1064 min_t(unsigned int, data_buf [0], wLength));
1065 OK (len);
1066 }
1067
1068 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1069
1070 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1071
1072 default:
1073 dbg ("unsupported root hub command");
1074 stat = USB_ST_STALLED;
1075 }
1076
1077 #ifdef DEBUG
1078 ohci_dump_roothub (&gohci, 1);
1079 #endif
1080
1081 len = min_t(int, len, leni);
1082 if (data != data_buf)
1083 memcpy (data, data_buf, len);
1084 dev->act_len = len;
1085 dev->status = stat;
1086
1087 #ifdef DEBUG
1088 if (transfer_len)
1089 urb_priv.actual_length = transfer_len;
1090 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1091 #endif
1092
1093 return stat;
1094 }
1095
1096 /*-------------------------------------------------------------------------*/
1097
1098 /* common code for handling submit messages - used for all but root hub */
1099 /* accesses. */
1100 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1101 int transfer_len, struct devrequest *setup, int interval)
1102 {
1103 int stat = 0;
1104 int maxsize = usb_maxpacket(dev, pipe);
1105 int timeout;
1106
1107 /* device pulled? Shortcut the action. */
1108 if (devgone == dev) {
1109 dev->status = USB_ST_CRC_ERR;
1110 return 0;
1111 }
1112
1113 #ifdef DEBUG
1114 urb_priv.actual_length = 0;
1115 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1116 #endif
1117 if (!maxsize) {
1118 err("submit_common_message: pipesize for pipe %lx is zero",
1119 pipe);
1120 return -1;
1121 }
1122
1123 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1124 err("sohci_submit_job failed");
1125 return -1;
1126 }
1127
1128 /* allow more time for a BULK device to react - some are slow */
1129 #define BULK_TO 5000 /* timeout in milliseconds */
1130 if (usb_pipebulk(pipe))
1131 timeout = BULK_TO;
1132 else
1133 timeout = 100;
1134
1135 /* wait for it to complete */
1136 for (;;) {
1137 /* check whether the controller is done */
1138 stat = hc_interrupt();
1139 if (stat < 0) {
1140 stat = USB_ST_CRC_ERR;
1141 break;
1142 }
1143
1144 /* NOTE: since we are not interrupt driven in U-Boot and always
1145 * handle only one URB at a time, we cannot assume the
1146 * transaction finished on the first successful return from
1147 * hc_interrupt().. unless the flag for current URB is set,
1148 * meaning that all TD's to/from device got actually
1149 * transferred and processed. If the current URB is not
1150 * finished we need to re-iterate this loop so as
1151 * hc_interrupt() gets called again as there needs to be some
1152 * more TD's to process still */
1153 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
1154 /* 0xff is returned for an SF-interrupt */
1155 break;
1156 }
1157
1158 if (--timeout) {
1159 mdelay(1);
1160 if (!urb_finished)
1161 dbg("\%");
1162
1163 } else {
1164 err("CTL:TIMEOUT ");
1165 dbg("submit_common_msg: TO status %x\n", stat);
1166 stat = USB_ST_CRC_ERR;
1167 urb_finished = 1;
1168 break;
1169 }
1170 }
1171 #if 0
1172 /* we got an Root Hub Status Change interrupt */
1173 if (got_rhsc) {
1174 #ifdef DEBUG
1175 ohci_dump_roothub (&gohci, 1);
1176 #endif
1177 got_rhsc = 0;
1178 /* abuse timeout */
1179 timeout = rh_check_port_status(&gohci);
1180 if (timeout >= 0) {
1181 #if 0 /* this does nothing useful, but leave it here in case that changes */
1182 /* the called routine adds 1 to the passed value */
1183 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1184 #endif
1185 /*
1186 * XXX
1187 * This is potentially dangerous because it assumes
1188 * that only one device is ever plugged in!
1189 */
1190 devgone = dev;
1191 }
1192 }
1193 #endif
1194
1195 dev->status = stat;
1196 dev->act_len = transfer_len;
1197
1198 #ifdef DEBUG
1199 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1200 #endif
1201
1202 /* free TDs in urb_priv */
1203 urb_free_priv (&urb_priv);
1204 return 0;
1205 }
1206
1207 /* submit routines called from usb.c */
1208 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1209 int transfer_len)
1210 {
1211 info("submit_bulk_msg");
1212 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1213 }
1214
1215 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1216 int transfer_len, struct devrequest *setup)
1217 {
1218 int maxsize = usb_maxpacket(dev, pipe);
1219
1220 info("submit_control_msg");
1221 #ifdef DEBUG
1222 urb_priv.actual_length = 0;
1223 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1224 #endif
1225 if (!maxsize) {
1226 err("submit_control_message: pipesize for pipe %lx is zero",
1227 pipe);
1228 return -1;
1229 }
1230 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1231 gohci.rh.dev = dev;
1232 /* root hub - redirect */
1233 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1234 setup);
1235 }
1236
1237 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1238 }
1239
1240 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1241 int transfer_len, int interval)
1242 {
1243 info("submit_int_msg");
1244 return -1;
1245 }
1246
1247 /*-------------------------------------------------------------------------*
1248 * HC functions
1249 *-------------------------------------------------------------------------*/
1250
1251 /* reset the HC and BUS */
1252
1253 static int hc_reset (ohci_t *ohci)
1254 {
1255 int timeout = 30;
1256 int smm_timeout = 50; /* 0,5 sec */
1257
1258 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1259 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1260 info("USB HC TakeOver from SMM");
1261 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1262 mdelay (10);
1263 if (--smm_timeout == 0) {
1264 err("USB HC TakeOver failed!");
1265 return -1;
1266 }
1267 }
1268 }
1269
1270 /* Disable HC interrupts */
1271 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1272
1273 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1274 ohci->slot_name,
1275 readl (&ohci->regs->control));
1276
1277 /* Reset USB (needed by some controllers) */
1278 ohci->hc_control = 0;
1279 writel (ohci->hc_control, &ohci->regs->control);
1280
1281 /* HC Reset requires max 10 us delay */
1282 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1283 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1284 if (--timeout == 0) {
1285 err("USB HC reset timed out!");
1286 return -1;
1287 }
1288 udelay (1);
1289 }
1290 return 0;
1291 }
1292
1293 /*-------------------------------------------------------------------------*/
1294
1295 /* Start an OHCI controller, set the BUS operational
1296 * enable interrupts
1297 * connect the virtual root hub */
1298
1299 static int hc_start (ohci_t * ohci)
1300 {
1301 __u32 mask;
1302 unsigned int fminterval;
1303
1304 ohci->disabled = 1;
1305
1306 /* Tell the controller where the control and bulk lists are
1307 * The lists are empty now. */
1308
1309 writel (0, &ohci->regs->ed_controlhead);
1310 writel (0, &ohci->regs->ed_bulkhead);
1311
1312 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1313
1314 fminterval = 0x2edf;
1315 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1316 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1317 writel (fminterval, &ohci->regs->fminterval);
1318 writel (0x628, &ohci->regs->lsthresh);
1319
1320 /* start controller operations */
1321 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1322 ohci->disabled = 0;
1323 writel (ohci->hc_control, &ohci->regs->control);
1324
1325 /* disable all interrupts */
1326 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1327 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1328 OHCI_INTR_OC | OHCI_INTR_MIE);
1329 writel (mask, &ohci->regs->intrdisable);
1330 /* clear all interrupts */
1331 mask &= ~OHCI_INTR_MIE;
1332 writel (mask, &ohci->regs->intrstatus);
1333 /* Choose the interrupts we care about now - but w/o MIE */
1334 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1335 writel (mask, &ohci->regs->intrenable);
1336
1337 #ifdef OHCI_USE_NPS
1338 /* required for AMD-756 and some Mac platforms */
1339 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1340 &ohci->regs->roothub.a);
1341 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1342 #endif /* OHCI_USE_NPS */
1343
1344 /* POTPGT delay is bits 24-31, in 2 ms units. */
1345 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1346
1347 /* connect the virtual root hub */
1348 ohci->rh.devnum = 0;
1349
1350 return 0;
1351 }
1352
1353 /*-------------------------------------------------------------------------*/
1354
1355 /* an interrupt happens */
1356
1357 static int
1358 hc_interrupt (void)
1359 {
1360 ohci_t *ohci = &gohci;
1361 struct ohci_regs *regs = ohci->regs;
1362 int ints;
1363 int stat = -1;
1364
1365 if ((ohci->hcca->done_head != 0) &&
1366 !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
1367
1368 ints = OHCI_INTR_WDH;
1369
1370 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1371 ohci->disabled++;
1372 err ("%s device removed!", ohci->slot_name);
1373 return -1;
1374
1375 } else if ((ints &= readl (&regs->intrenable)) == 0) {
1376 dbg("hc_interrupt: returning..\n");
1377 return 0xff;
1378 }
1379
1380 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1381
1382 if (ints & OHCI_INTR_RHSC) {
1383 got_rhsc = 1;
1384 stat = 0xff;
1385 }
1386
1387 if (ints & OHCI_INTR_UE) {
1388 ohci->disabled++;
1389 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1390 ohci->slot_name);
1391 /* e.g. due to PCI Master/Target Abort */
1392
1393 #ifdef DEBUG
1394 ohci_dump (ohci, 1);
1395 #endif
1396 /* FIXME: be optimistic, hope that bug won't repeat often. */
1397 /* Make some non-interrupt context restart the controller. */
1398 /* Count and limit the retries though; either hardware or */
1399 /* software errors can go forever... */
1400 hc_reset (ohci);
1401 return -1;
1402 }
1403
1404 if (ints & OHCI_INTR_WDH) {
1405 writel (OHCI_INTR_WDH, &regs->intrdisable);
1406 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1407 writel (OHCI_INTR_WDH, &regs->intrenable);
1408 }
1409
1410 if (ints & OHCI_INTR_SO) {
1411 dbg("USB Schedule overrun\n");
1412 writel (OHCI_INTR_SO, &regs->intrenable);
1413 stat = -1;
1414 }
1415
1416 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1417 if (ints & OHCI_INTR_SF) {
1418 unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
1419 mdelay(1);
1420 writel (OHCI_INTR_SF, &regs->intrdisable);
1421 if (ohci->ed_rm_list[frame] != NULL)
1422 writel (OHCI_INTR_SF, &regs->intrenable);
1423 stat = 0xff;
1424 }
1425
1426 writel (ints, &regs->intrstatus);
1427 return stat;
1428 }
1429
1430 /*-------------------------------------------------------------------------*/
1431
1432 /*-------------------------------------------------------------------------*/
1433
1434 /* De-allocate all resources.. */
1435
1436 static void hc_release_ohci (ohci_t *ohci)
1437 {
1438 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1439
1440 if (!ohci->disabled)
1441 hc_reset (ohci);
1442 }
1443
1444 /*-------------------------------------------------------------------------*/
1445
1446 /*
1447 * low level initalisation routine, called from usb.c
1448 */
1449 static char ohci_inited = 0;
1450
1451 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1452 {
1453 memset (&gohci, 0, sizeof (ohci_t));
1454 memset (&urb_priv, 0, sizeof (urb_priv_t));
1455
1456 /* align the storage */
1457 if ((__u32)&ghcca[0] & 0xff) {
1458 err("HCCA not aligned!!");
1459 return -1;
1460 }
1461 phcca = &ghcca[0];
1462 info("aligned ghcca %p", phcca);
1463 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1464 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1465 err("EDs not aligned!!");
1466 return -1;
1467 }
1468 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1469 if ((__u32)gtd & 0x7) {
1470 err("TDs not aligned!!");
1471 return -1;
1472 }
1473 ptd = gtd;
1474 gohci.hcca = phcca;
1475 memset (phcca, 0, sizeof (struct ohci_hcca));
1476
1477 gohci.disabled = 1;
1478 gohci.sleeping = 0;
1479 gohci.irq = -1;
1480 #if defined(CONFIG_440EP)
1481 gohci.regs = (struct ohci_regs *)(CONFIG_SYS_PERIPHERAL_BASE | 0x1000);
1482 #elif defined(CONFIG_440EPX) || defined(CONFIG_SYS_USB_HOST)
1483 gohci.regs = (struct ohci_regs *)(CONFIG_SYS_USB_HOST);
1484 #endif
1485
1486 gohci.flags = 0;
1487 gohci.slot_name = "ppc440";
1488
1489 if (hc_reset (&gohci) < 0) {
1490 hc_release_ohci (&gohci);
1491 return -1;
1492 }
1493
1494 if (hc_start (&gohci) < 0) {
1495 err ("can't start usb-%s", gohci.slot_name);
1496 hc_release_ohci (&gohci);
1497 return -1;
1498 }
1499
1500 #ifdef DEBUG
1501 ohci_dump (&gohci, 1);
1502 #endif
1503 ohci_inited = 1;
1504 urb_finished = 1;
1505
1506 return 0;
1507 }
1508
1509 int usb_lowlevel_stop(int index)
1510 {
1511 /* this gets called really early - before the controller has */
1512 /* even been initialized! */
1513 if (!ohci_inited)
1514 return 0;
1515 /* TODO release any interrupts, etc. */
1516 /* call hc_release_ohci() here ? */
1517 hc_reset (&gohci);
1518 return 0;
1519 }
1520
1521 #endif /* CONFIG_USB_OHCI */
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