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Merge branch 'master' of git://git.denx.de/u-boot-arm into master
[people/ms/u-boot.git] / arch / powerpc / cpu / ppc4xx / usb_ohci.c
1 /*
2 * URB OHCI HCD (Host Controller Driver) for USB on the PPC440EP.
3 *
4 * (C) Copyright 2003-2004
5 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
6 *
7 * (C) Copyright 2004
8 * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
9 *
10 * Note: Much of this code has been derived from Linux 2.4
11 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
12 * (C) Copyright 2000-2002 David Brownell
13 *
14 * SPDX-License-Identifier: GPL-2.0+
15 */
16 /*
17 * IMPORTANT NOTES
18 * 1 - this driver is intended for use with USB Mass Storage Devices
19 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
20 */
21
22 #include <common.h>
23
24 #ifdef CONFIG_USB_OHCI
25
26 #include <malloc.h>
27 #include <usb.h>
28 #include "usb_ohci.h"
29
30 #define OHCI_USE_NPS /* force NoPowerSwitching mode */
31 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
32 #undef DEBUG
33 #undef SHOW_INFO
34 #undef OHCI_FILL_TRACE
35
36 /* For initializing controller (mask in an HCFS mode too) */
37 #define OHCI_CONTROL_INIT \
38 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
39
40 #define readl(a) (*((volatile u32 *)(a)))
41 #define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
42
43 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
44
45 #ifdef DEBUG
46 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
47 #else
48 #define dbg(format, arg...) do {} while(0)
49 #endif /* DEBUG */
50 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
51 #ifdef SHOW_INFO
52 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
53 #else
54 #define info(format, arg...) do {} while(0)
55 #endif
56
57 #define m16_swap(x) swap_16(x)
58 #define m32_swap(x) swap_32(x)
59
60 #if defined(CONFIG_405EZ) || defined(CONFIG_440EP) || defined(CONFIG_440EPX)
61 #define ohci_cpu_to_le16(x) (x)
62 #define ohci_cpu_to_le32(x) (x)
63 #else
64 #define ohci_cpu_to_le16(x) swap_16(x)
65 #define ohci_cpu_to_le32(x) swap_32(x)
66 #endif
67
68 /* global ohci_t */
69 static ohci_t gohci;
70 /* this must be aligned to a 256 byte boundary */
71 struct ohci_hcca ghcca[1];
72 /* a pointer to the aligned storage */
73 struct ohci_hcca *phcca;
74 /* this allocates EDs for all possible endpoints */
75 struct ohci_device ohci_dev;
76 /* urb_priv */
77 urb_priv_t urb_priv;
78 /* RHSC flag */
79 int got_rhsc;
80 /* device which was disconnected */
81 struct usb_device *devgone;
82 /* flag guarding URB transation */
83 int urb_finished = 0;
84
85 /*-------------------------------------------------------------------------*/
86
87 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
88 * The erratum (#4) description is incorrect. AMD's workaround waits
89 * till some bits (mostly reserved) are clear; ok for all revs.
90 */
91 #define OHCI_QUIRK_AMD756 0xabcd
92 #define read_roothub(hc, register, mask) ({ \
93 u32 temp = readl (&hc->regs->roothub.register); \
94 if (hc->flags & OHCI_QUIRK_AMD756) \
95 while (temp & mask) \
96 temp = readl (&hc->regs->roothub.register); \
97 temp; })
98
99 static u32 roothub_a (struct ohci *hc)
100 { return read_roothub (hc, a, 0xfc0fe000); }
101 static inline u32 roothub_b (struct ohci *hc)
102 { return readl (&hc->regs->roothub.b); }
103 static inline u32 roothub_status (struct ohci *hc)
104 { return readl (&hc->regs->roothub.status); }
105 static u32 roothub_portstatus (struct ohci *hc, int i)
106 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
107
108
109 /* forward declaration */
110 static int hc_interrupt (void);
111 static void
112 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
113 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
114
115 /*-------------------------------------------------------------------------*
116 * URB support functions
117 *-------------------------------------------------------------------------*/
118
119 /* free HCD-private data associated with this URB */
120
121 static void urb_free_priv (urb_priv_t * urb)
122 {
123 int i;
124 int last;
125 struct td * td;
126
127 last = urb->length - 1;
128 if (last >= 0) {
129 for (i = 0; i <= last; i++) {
130 td = urb->td[i];
131 if (td) {
132 td->usb_dev = NULL;
133 urb->td[i] = NULL;
134 }
135 }
136 }
137 }
138
139 /*-------------------------------------------------------------------------*/
140
141 #ifdef DEBUG
142 static int sohci_get_current_frame_number (struct usb_device * dev);
143
144 /* debug| print the main components of an URB
145 * small: 0) header + data packets 1) just header */
146
147 static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
148 int transfer_len, struct devrequest * setup, char * str, int small)
149 {
150 urb_priv_t * purb = &urb_priv;
151
152 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
153 str,
154 sohci_get_current_frame_number (dev),
155 usb_pipedevice (pipe),
156 usb_pipeendpoint (pipe),
157 usb_pipeout (pipe)? 'O': 'I',
158 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
159 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
160 purb->actual_length,
161 transfer_len, dev->status);
162 #ifdef OHCI_VERBOSE_DEBUG
163 if (!small) {
164 int i, len;
165
166 if (usb_pipecontrol (pipe)) {
167 printf (__FILE__ ": cmd(8):");
168 for (i = 0; i < 8 ; i++)
169 printf (" %02x", ((__u8 *) setup) [i]);
170 printf ("\n");
171 }
172 if (transfer_len > 0 && buffer) {
173 printf (__FILE__ ": data(%d/%d):",
174 purb->actual_length,
175 transfer_len);
176 len = usb_pipeout (pipe)?
177 transfer_len: purb->actual_length;
178 for (i = 0; i < 16 && i < len; i++)
179 printf (" %02x", ((__u8 *) buffer) [i]);
180 printf ("%s\n", i < len? "...": "");
181 }
182 }
183 #endif
184 }
185
186 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
187 void ep_print_int_eds (ohci_t *ohci, char * str) {
188 int i, j;
189 __u32 * ed_p;
190 for (i= 0; i < 32; i++) {
191 j = 5;
192 ed_p = &(ohci->hcca->int_table [i]);
193 if (*ed_p == 0)
194 continue;
195 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
196 while (*ed_p != 0 && j--) {
197 ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
198 printf (" ed: %4x;", ed->hwINFO);
199 ed_p = &ed->hwNextED;
200 }
201 printf ("\n");
202 }
203 }
204
205 static void ohci_dump_intr_mask (char *label, __u32 mask)
206 {
207 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
208 label,
209 mask,
210 (mask & OHCI_INTR_MIE) ? " MIE" : "",
211 (mask & OHCI_INTR_OC) ? " OC" : "",
212 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
213 (mask & OHCI_INTR_FNO) ? " FNO" : "",
214 (mask & OHCI_INTR_UE) ? " UE" : "",
215 (mask & OHCI_INTR_RD) ? " RD" : "",
216 (mask & OHCI_INTR_SF) ? " SF" : "",
217 (mask & OHCI_INTR_WDH) ? " WDH" : "",
218 (mask & OHCI_INTR_SO) ? " SO" : ""
219 );
220 }
221
222 static void maybe_print_eds (char *label, __u32 value)
223 {
224 ed_t *edp = (ed_t *)value;
225
226 if (value) {
227 dbg ("%s %08x", label, value);
228 dbg ("%08x", edp->hwINFO);
229 dbg ("%08x", edp->hwTailP);
230 dbg ("%08x", edp->hwHeadP);
231 dbg ("%08x", edp->hwNextED);
232 }
233 }
234
235 static char * hcfs2string (int state)
236 {
237 switch (state) {
238 case OHCI_USB_RESET: return "reset";
239 case OHCI_USB_RESUME: return "resume";
240 case OHCI_USB_OPER: return "operational";
241 case OHCI_USB_SUSPEND: return "suspend";
242 }
243 return "?";
244 }
245
246 /* dump control and status registers */
247 static void ohci_dump_status (ohci_t *controller)
248 {
249 struct ohci_regs *regs = controller->regs;
250 __u32 temp;
251
252 temp = readl (&regs->revision) & 0xff;
253 if (temp != 0x10)
254 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
255
256 temp = readl (&regs->control);
257 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
258 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
259 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
260 (temp & OHCI_CTRL_IR) ? " IR" : "",
261 hcfs2string (temp & OHCI_CTRL_HCFS),
262 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
263 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
264 (temp & OHCI_CTRL_IE) ? " IE" : "",
265 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
266 temp & OHCI_CTRL_CBSR
267 );
268
269 temp = readl (&regs->cmdstatus);
270 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
271 (temp & OHCI_SOC) >> 16,
272 (temp & OHCI_OCR) ? " OCR" : "",
273 (temp & OHCI_BLF) ? " BLF" : "",
274 (temp & OHCI_CLF) ? " CLF" : "",
275 (temp & OHCI_HCR) ? " HCR" : ""
276 );
277
278 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
279 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
280
281 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
282
283 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
284 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
285
286 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
287 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
288
289 maybe_print_eds ("donehead", readl (&regs->donehead));
290 }
291
292 static void ohci_dump_roothub (ohci_t *controller, int verbose)
293 {
294 __u32 temp, ndp, i;
295
296 temp = roothub_a (controller);
297 ndp = (temp & RH_A_NDP);
298
299 if (verbose) {
300 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
301 ((temp & RH_A_POTPGT) >> 24) & 0xff,
302 (temp & RH_A_NOCP) ? " NOCP" : "",
303 (temp & RH_A_OCPM) ? " OCPM" : "",
304 (temp & RH_A_DT) ? " DT" : "",
305 (temp & RH_A_NPS) ? " NPS" : "",
306 (temp & RH_A_PSM) ? " PSM" : "",
307 ndp
308 );
309 temp = roothub_b (controller);
310 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
311 temp,
312 (temp & RH_B_PPCM) >> 16,
313 (temp & RH_B_DR)
314 );
315 temp = roothub_status (controller);
316 dbg ("roothub.status: %08x%s%s%s%s%s%s",
317 temp,
318 (temp & RH_HS_CRWE) ? " CRWE" : "",
319 (temp & RH_HS_OCIC) ? " OCIC" : "",
320 (temp & RH_HS_LPSC) ? " LPSC" : "",
321 (temp & RH_HS_DRWE) ? " DRWE" : "",
322 (temp & RH_HS_OCI) ? " OCI" : "",
323 (temp & RH_HS_LPS) ? " LPS" : ""
324 );
325 }
326
327 for (i = 0; i < ndp; i++) {
328 temp = roothub_portstatus (controller, i);
329 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
330 i,
331 temp,
332 (temp & RH_PS_PRSC) ? " PRSC" : "",
333 (temp & RH_PS_OCIC) ? " OCIC" : "",
334 (temp & RH_PS_PSSC) ? " PSSC" : "",
335 (temp & RH_PS_PESC) ? " PESC" : "",
336 (temp & RH_PS_CSC) ? " CSC" : "",
337
338 (temp & RH_PS_LSDA) ? " LSDA" : "",
339 (temp & RH_PS_PPS) ? " PPS" : "",
340 (temp & RH_PS_PRS) ? " PRS" : "",
341 (temp & RH_PS_POCI) ? " POCI" : "",
342 (temp & RH_PS_PSS) ? " PSS" : "",
343
344 (temp & RH_PS_PES) ? " PES" : "",
345 (temp & RH_PS_CCS) ? " CCS" : ""
346 );
347 }
348 }
349
350 static void ohci_dump (ohci_t *controller, int verbose)
351 {
352 dbg ("OHCI controller usb-%s state", controller->slot_name);
353
354 /* dumps some of the state we know about */
355 ohci_dump_status (controller);
356 if (verbose)
357 ep_print_int_eds (controller, "hcca");
358 dbg ("hcca frame #%04x", controller->hcca->frame_no);
359 ohci_dump_roothub (controller, 1);
360 }
361
362
363 #endif /* DEBUG */
364
365 /*-------------------------------------------------------------------------*
366 * Interface functions (URB)
367 *-------------------------------------------------------------------------*/
368
369 /* get a transfer request */
370
371 int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
372 int transfer_len, struct devrequest *setup, int interval)
373 {
374 ohci_t *ohci;
375 ed_t * ed;
376 urb_priv_t *purb_priv;
377 int i, size = 0;
378
379 ohci = &gohci;
380
381 /* when controller's hung, permit only roothub cleanup attempts
382 * such as powering down ports */
383 if (ohci->disabled) {
384 err("sohci_submit_job: EPIPE");
385 return -1;
386 }
387
388 /* if we have an unfinished URB from previous transaction let's
389 * fail and scream as quickly as possible so as not to corrupt
390 * further communication */
391 if (!urb_finished) {
392 err("sohci_submit_job: URB NOT FINISHED");
393 return -1;
394 }
395 /* we're about to begin a new transaction here so mark the URB unfinished */
396 urb_finished = 0;
397
398 /* every endpoint has a ed, locate and fill it */
399 if (!(ed = ep_add_ed (dev, pipe))) {
400 err("sohci_submit_job: ENOMEM");
401 return -1;
402 }
403
404 /* for the private part of the URB we need the number of TDs (size) */
405 switch (usb_pipetype (pipe)) {
406 case PIPE_BULK: /* one TD for every 4096 Byte */
407 size = (transfer_len - 1) / 4096 + 1;
408 break;
409 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
410 size = (transfer_len == 0)? 2:
411 (transfer_len - 1) / 4096 + 3;
412 break;
413 }
414
415 if (size >= (N_URB_TD - 1)) {
416 err("need %d TDs, only have %d", size, N_URB_TD);
417 return -1;
418 }
419 purb_priv = &urb_priv;
420 purb_priv->pipe = pipe;
421
422 /* fill the private part of the URB */
423 purb_priv->length = size;
424 purb_priv->ed = ed;
425 purb_priv->actual_length = 0;
426
427 /* allocate the TDs */
428 /* note that td[0] was allocated in ep_add_ed */
429 for (i = 0; i < size; i++) {
430 purb_priv->td[i] = td_alloc (dev);
431 if (!purb_priv->td[i]) {
432 purb_priv->length = i;
433 urb_free_priv (purb_priv);
434 err("sohci_submit_job: ENOMEM");
435 return -1;
436 }
437 }
438
439 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
440 urb_free_priv (purb_priv);
441 err("sohci_submit_job: EINVAL");
442 return -1;
443 }
444
445 /* link the ed into a chain if is not already */
446 if (ed->state != ED_OPER)
447 ep_link (ohci, ed);
448
449 /* fill the TDs and link it to the ed */
450 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
451
452 return 0;
453 }
454
455 /*-------------------------------------------------------------------------*/
456
457 #ifdef DEBUG
458 /* tell us the current USB frame number */
459
460 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
461 {
462 ohci_t *ohci = &gohci;
463
464 return ohci_cpu_to_le16 (ohci->hcca->frame_no);
465 }
466 #endif
467
468 /*-------------------------------------------------------------------------*
469 * ED handling functions
470 *-------------------------------------------------------------------------*/
471
472 /* link an ed into one of the HC chains */
473
474 static int ep_link (ohci_t *ohci, ed_t *edi)
475 {
476 volatile ed_t *ed = edi;
477
478 ed->state = ED_OPER;
479
480 switch (ed->type) {
481 case PIPE_CONTROL:
482 ed->hwNextED = 0;
483 if (ohci->ed_controltail == NULL) {
484 writel (ed, &ohci->regs->ed_controlhead);
485 } else {
486 ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
487 }
488 ed->ed_prev = ohci->ed_controltail;
489 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
490 !ohci->ed_rm_list[1] && !ohci->sleeping) {
491 ohci->hc_control |= OHCI_CTRL_CLE;
492 writel (ohci->hc_control, &ohci->regs->control);
493 }
494 ohci->ed_controltail = edi;
495 break;
496
497 case PIPE_BULK:
498 ed->hwNextED = 0;
499 if (ohci->ed_bulktail == NULL) {
500 writel (ed, &ohci->regs->ed_bulkhead);
501 } else {
502 ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
503 }
504 ed->ed_prev = ohci->ed_bulktail;
505 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
506 !ohci->ed_rm_list[1] && !ohci->sleeping) {
507 ohci->hc_control |= OHCI_CTRL_BLE;
508 writel (ohci->hc_control, &ohci->regs->control);
509 }
510 ohci->ed_bulktail = edi;
511 break;
512 }
513 return 0;
514 }
515
516 /*-------------------------------------------------------------------------*/
517
518 /* unlink an ed from one of the HC chains.
519 * just the link to the ed is unlinked.
520 * the link from the ed still points to another operational ed or 0
521 * so the HC can eventually finish the processing of the unlinked ed */
522
523 static int ep_unlink (ohci_t *ohci, ed_t *edi)
524 {
525 volatile ed_t *ed = edi;
526
527 ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
528
529 switch (ed->type) {
530 case PIPE_CONTROL:
531 if (ed->ed_prev == NULL) {
532 if (!ed->hwNextED) {
533 ohci->hc_control &= ~OHCI_CTRL_CLE;
534 writel (ohci->hc_control, &ohci->regs->control);
535 }
536 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
537 } else {
538 ed->ed_prev->hwNextED = ed->hwNextED;
539 }
540 if (ohci->ed_controltail == ed) {
541 ohci->ed_controltail = ed->ed_prev;
542 } else {
543 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
544 }
545 break;
546
547 case PIPE_BULK:
548 if (ed->ed_prev == NULL) {
549 if (!ed->hwNextED) {
550 ohci->hc_control &= ~OHCI_CTRL_BLE;
551 writel (ohci->hc_control, &ohci->regs->control);
552 }
553 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
554 } else {
555 ed->ed_prev->hwNextED = ed->hwNextED;
556 }
557 if (ohci->ed_bulktail == ed) {
558 ohci->ed_bulktail = ed->ed_prev;
559 } else {
560 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
561 }
562 break;
563 }
564 ed->state = ED_UNLINK;
565 return 0;
566 }
567
568
569 /*-------------------------------------------------------------------------*/
570
571 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
572 * but the USB stack is a little bit stateless so we do it at every transaction
573 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
574 * in all other cases the state is left unchanged
575 * the ed info fields are setted anyway even though most of them should not change */
576
577 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
578 {
579 td_t *td;
580 ed_t *ed_ret;
581 volatile ed_t *ed;
582
583 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
584 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
585
586 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
587 err("ep_add_ed: pending delete");
588 /* pending delete request */
589 return NULL;
590 }
591
592 if (ed->state == ED_NEW) {
593 ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
594 /* dummy td; end of td list for ed */
595 td = td_alloc (usb_dev);
596 ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
597 ed->hwHeadP = ed->hwTailP;
598 ed->state = ED_UNLINK;
599 ed->type = usb_pipetype (pipe);
600 ohci_dev.ed_cnt++;
601 }
602
603 ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
604 | usb_pipeendpoint (pipe) << 7
605 | (usb_pipeisoc (pipe)? 0x8000: 0)
606 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
607 | (usb_dev->speed == USB_SPEED_LOW) << 13
608 | usb_maxpacket (usb_dev, pipe) << 16);
609
610 return ed_ret;
611 }
612
613 /*-------------------------------------------------------------------------*
614 * TD handling functions
615 *-------------------------------------------------------------------------*/
616
617 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
618
619 static void td_fill (ohci_t *ohci, unsigned int info,
620 void *data, int len,
621 struct usb_device *dev, int index, urb_priv_t *urb_priv)
622 {
623 volatile td_t *td, *td_pt;
624 #ifdef OHCI_FILL_TRACE
625 int i;
626 #endif
627
628 if (index > urb_priv->length) {
629 err("index > length");
630 return;
631 }
632 /* use this td as the next dummy */
633 td_pt = urb_priv->td [index];
634 td_pt->hwNextTD = 0;
635
636 /* fill the old dummy TD */
637 td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
638
639 td->ed = urb_priv->ed;
640 td->next_dl_td = NULL;
641 td->index = index;
642 td->data = (__u32)data;
643 #ifdef OHCI_FILL_TRACE
644 if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
645 for (i = 0; i < len; i++)
646 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
647 printf("\n");
648 }
649 #endif
650 if (!len)
651 data = 0;
652
653 td->hwINFO = ohci_cpu_to_le32 (info);
654 td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
655 if (data)
656 td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
657 else
658 td->hwBE = 0;
659 td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
660
661 /* append to queue */
662 td->ed->hwTailP = td->hwNextTD;
663 }
664
665 /*-------------------------------------------------------------------------*/
666
667 /* prepare all TDs of a transfer */
668 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
669 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
670 {
671 ohci_t *ohci = &gohci;
672 int data_len = transfer_len;
673 void *data;
674 int cnt = 0;
675 __u32 info = 0;
676 unsigned int toggle = 0;
677
678 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
679 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
680 toggle = TD_T_TOGGLE;
681 } else {
682 toggle = TD_T_DATA0;
683 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
684 }
685 urb->td_cnt = 0;
686 if (data_len)
687 data = buffer;
688 else
689 data = 0;
690
691 switch (usb_pipetype (pipe)) {
692 case PIPE_BULK:
693 info = usb_pipeout (pipe)?
694 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
695 while(data_len > 4096) {
696 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
697 data += 4096; data_len -= 4096; cnt++;
698 }
699 info = usb_pipeout (pipe)?
700 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
701 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
702 cnt++;
703
704 if (!ohci->sleeping)
705 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
706 break;
707
708 case PIPE_CONTROL:
709 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
710 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
711 if (data_len > 0) {
712 info = usb_pipeout (pipe)?
713 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
714 /* NOTE: mishandles transfers >8K, some >4K */
715 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
716 }
717 info = usb_pipeout (pipe)?
718 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
719 td_fill (ohci, info, data, 0, dev, cnt++, urb);
720 if (!ohci->sleeping)
721 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
722 break;
723 }
724 if (urb->length != cnt)
725 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
726 }
727
728 /*-------------------------------------------------------------------------*
729 * Done List handling functions
730 *-------------------------------------------------------------------------*/
731
732
733 /* calculate the transfer length and update the urb */
734
735 static void dl_transfer_length(td_t * td)
736 {
737 __u32 tdBE, tdCBP;
738 urb_priv_t *lurb_priv = &urb_priv;
739
740 tdBE = ohci_cpu_to_le32 (td->hwBE);
741 tdCBP = ohci_cpu_to_le32 (td->hwCBP);
742
743
744 if (!(usb_pipecontrol(lurb_priv->pipe) &&
745 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
746 if (tdBE != 0) {
747 if (td->hwCBP == 0)
748 lurb_priv->actual_length += tdBE - td->data + 1;
749 else
750 lurb_priv->actual_length += tdCBP - td->data;
751 }
752 }
753 }
754
755 /*-------------------------------------------------------------------------*/
756
757 /* replies to the request have to be on a FIFO basis so
758 * we reverse the reversed done-list */
759
760 static td_t * dl_reverse_done_list (ohci_t *ohci)
761 {
762 __u32 td_list_hc;
763 td_t *td_rev = NULL;
764 td_t *td_list = NULL;
765 urb_priv_t *lurb_priv = NULL;
766
767 td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
768 ohci->hcca->done_head = 0;
769
770 while (td_list_hc) {
771 td_list = (td_t *)td_list_hc;
772
773 if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
774 lurb_priv = &urb_priv;
775 dbg(" USB-error/status: %x : %p",
776 TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
777 if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
778 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
779 td_list->ed->hwHeadP =
780 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
781 (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
782 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
783 } else
784 td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
785 }
786 #ifdef CONFIG_MPC5200
787 td_list->hwNextTD = 0;
788 #endif
789 }
790
791 td_list->next_dl_td = td_rev;
792 td_rev = td_list;
793 td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
794 }
795 return td_list;
796 }
797
798 /*-------------------------------------------------------------------------*/
799
800 /* td done list */
801 static int dl_done_list (ohci_t *ohci, td_t *td_list)
802 {
803 td_t *td_list_next = NULL;
804 ed_t *ed;
805 int cc = 0;
806 int stat = 0;
807 /* urb_t *urb; */
808 urb_priv_t *lurb_priv;
809 __u32 tdINFO, edHeadP, edTailP;
810
811 while (td_list) {
812 td_list_next = td_list->next_dl_td;
813
814 lurb_priv = &urb_priv;
815 tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
816
817 ed = td_list->ed;
818
819 dl_transfer_length(td_list);
820
821 /* error code of transfer */
822 cc = TD_CC_GET (tdINFO);
823 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
824 if ((ed->state & (ED_OPER | ED_UNLINK))
825 && (lurb_priv->state != URB_DEL)) {
826 dbg("ConditionCode %#x", cc);
827 stat = cc_to_error[cc];
828 urb_finished = 1;
829 }
830 }
831
832 if (ed->state != ED_NEW) {
833 edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
834 edTailP = ohci_cpu_to_le32 (ed->hwTailP);
835
836 /* unlink eds if they are not busy */
837 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
838 ep_unlink (ohci, ed);
839 }
840
841 td_list = td_list_next;
842 }
843 return stat;
844 }
845
846 /*-------------------------------------------------------------------------*
847 * Virtual Root Hub
848 *-------------------------------------------------------------------------*/
849
850 #include <usbroothubdes.h>
851
852 /* Hub class-specific descriptor is constructed dynamically */
853
854
855 /*-------------------------------------------------------------------------*/
856
857 #define OK(x) len = (x); break
858 #ifdef DEBUG
859 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
860 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
861 #else
862 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
863 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
864 #endif
865 #define RD_RH_STAT roothub_status(&gohci)
866 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
867
868 /* request to virtual root hub */
869
870 int rh_check_port_status(ohci_t *controller)
871 {
872 __u32 temp, ndp, i;
873 int res;
874
875 res = -1;
876 temp = roothub_a (controller);
877 ndp = (temp & RH_A_NDP);
878 for (i = 0; i < ndp; i++) {
879 temp = roothub_portstatus (controller, i);
880 /* check for a device disconnect */
881 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
882 (RH_PS_PESC | RH_PS_CSC)) &&
883 ((temp & RH_PS_CCS) == 0)) {
884 res = i;
885 break;
886 }
887 }
888 return res;
889 }
890
891 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
892 void *buffer, int transfer_len, struct devrequest *cmd)
893 {
894 void * data = buffer;
895 int leni = transfer_len;
896 int len = 0;
897 int stat = 0;
898 __u32 datab[4];
899 __u8 *data_buf = (__u8 *)datab;
900 __u16 bmRType_bReq;
901 __u16 wValue;
902 __u16 wIndex;
903 __u16 wLength;
904
905 #ifdef DEBUG
906 urb_priv.actual_length = 0;
907 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
908 #endif
909 if (usb_pipeint(pipe)) {
910 info("Root-Hub submit IRQ: NOT implemented");
911 return 0;
912 }
913
914 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
915 wValue = m16_swap (cmd->value);
916 wIndex = m16_swap (cmd->index);
917 wLength = m16_swap (cmd->length);
918
919 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
920 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
921
922 switch (bmRType_bReq) {
923 /* Request Destination:
924 without flags: Device,
925 RH_INTERFACE: interface,
926 RH_ENDPOINT: endpoint,
927 RH_CLASS means HUB here,
928 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
929 */
930
931 case RH_GET_STATUS:
932 *(__u16 *) data_buf = m16_swap (1); OK (2);
933 case RH_GET_STATUS | RH_INTERFACE:
934 *(__u16 *) data_buf = m16_swap (0); OK (2);
935 case RH_GET_STATUS | RH_ENDPOINT:
936 *(__u16 *) data_buf = m16_swap (0); OK (2);
937 case RH_GET_STATUS | RH_CLASS:
938 *(__u32 *) data_buf = m32_swap (
939 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
940 OK (4);
941 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
942 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
943
944 case RH_CLEAR_FEATURE | RH_ENDPOINT:
945 switch (wValue) {
946 case (RH_ENDPOINT_STALL): OK (0);
947 }
948 break;
949
950 case RH_CLEAR_FEATURE | RH_CLASS:
951 switch (wValue) {
952 case RH_C_HUB_LOCAL_POWER:
953 OK(0);
954 case (RH_C_HUB_OVER_CURRENT):
955 WR_RH_STAT(RH_HS_OCIC); OK (0);
956 }
957 break;
958
959 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
960 switch (wValue) {
961 case (RH_PORT_ENABLE):
962 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
963 case (RH_PORT_SUSPEND):
964 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
965 case (RH_PORT_POWER):
966 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
967 case (RH_C_PORT_CONNECTION):
968 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
969 case (RH_C_PORT_ENABLE):
970 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
971 case (RH_C_PORT_SUSPEND):
972 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
973 case (RH_C_PORT_OVER_CURRENT):
974 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
975 case (RH_C_PORT_RESET):
976 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
977 }
978 break;
979
980 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
981 switch (wValue) {
982 case (RH_PORT_SUSPEND):
983 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
984 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
985 if (RD_RH_PORTSTAT & RH_PS_CCS)
986 WR_RH_PORTSTAT (RH_PS_PRS);
987 OK (0);
988 case (RH_PORT_POWER):
989 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
990 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
991 if (RD_RH_PORTSTAT & RH_PS_CCS)
992 WR_RH_PORTSTAT (RH_PS_PES );
993 OK (0);
994 }
995 break;
996
997 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
998
999 case RH_GET_DESCRIPTOR:
1000 switch ((wValue & 0xff00) >> 8) {
1001 case (0x01): /* device descriptor */
1002 len = min_t(unsigned int,
1003 leni,
1004 min_t(unsigned int,
1005 sizeof (root_hub_dev_des),
1006 wLength));
1007 data_buf = root_hub_dev_des; OK(len);
1008 case (0x02): /* configuration descriptor */
1009 len = min_t(unsigned int,
1010 leni,
1011 min_t(unsigned int,
1012 sizeof (root_hub_config_des),
1013 wLength));
1014 data_buf = root_hub_config_des; OK(len);
1015 case (0x03): /* string descriptors */
1016 if(wValue==0x0300) {
1017 len = min_t(unsigned int,
1018 leni,
1019 min_t(unsigned int,
1020 sizeof (root_hub_str_index0),
1021 wLength));
1022 data_buf = root_hub_str_index0;
1023 OK(len);
1024 }
1025 if(wValue==0x0301) {
1026 len = min_t(unsigned int,
1027 leni,
1028 min_t(unsigned int,
1029 sizeof (root_hub_str_index1),
1030 wLength));
1031 data_buf = root_hub_str_index1;
1032 OK(len);
1033 }
1034 default:
1035 stat = USB_ST_STALLED;
1036 }
1037 break;
1038
1039 case RH_GET_DESCRIPTOR | RH_CLASS:
1040 {
1041 __u32 temp = roothub_a (&gohci);
1042
1043 data_buf [0] = 9; /* min length; */
1044 data_buf [1] = 0x29;
1045 data_buf [2] = temp & RH_A_NDP;
1046 data_buf [3] = 0;
1047 if (temp & RH_A_PSM) /* per-port power switching? */
1048 data_buf [3] |= 0x1;
1049 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1050 data_buf [3] |= 0x10;
1051 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1052 data_buf [3] |= 0x8;
1053
1054 /* corresponds to data_buf[4-7] */
1055 datab [1] = 0;
1056 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1057 temp = roothub_b (&gohci);
1058 data_buf [7] = temp & RH_B_DR;
1059 if (data_buf [2] < 7) {
1060 data_buf [8] = 0xff;
1061 } else {
1062 data_buf [0] += 2;
1063 data_buf [8] = (temp & RH_B_DR) >> 8;
1064 data_buf [10] = data_buf [9] = 0xff;
1065 }
1066
1067 len = min_t(unsigned int, leni,
1068 min_t(unsigned int, data_buf [0], wLength));
1069 OK (len);
1070 }
1071
1072 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1073
1074 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1075
1076 default:
1077 dbg ("unsupported root hub command");
1078 stat = USB_ST_STALLED;
1079 }
1080
1081 #ifdef DEBUG
1082 ohci_dump_roothub (&gohci, 1);
1083 #endif
1084
1085 len = min_t(int, len, leni);
1086 if (data != data_buf)
1087 memcpy (data, data_buf, len);
1088 dev->act_len = len;
1089 dev->status = stat;
1090
1091 #ifdef DEBUG
1092 if (transfer_len)
1093 urb_priv.actual_length = transfer_len;
1094 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1095 #endif
1096
1097 return stat;
1098 }
1099
1100 /*-------------------------------------------------------------------------*/
1101
1102 /* common code for handling submit messages - used for all but root hub */
1103 /* accesses. */
1104 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1105 int transfer_len, struct devrequest *setup, int interval)
1106 {
1107 int stat = 0;
1108 int maxsize = usb_maxpacket(dev, pipe);
1109 int timeout;
1110
1111 /* device pulled? Shortcut the action. */
1112 if (devgone == dev) {
1113 dev->status = USB_ST_CRC_ERR;
1114 return 0;
1115 }
1116
1117 #ifdef DEBUG
1118 urb_priv.actual_length = 0;
1119 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1120 #endif
1121 if (!maxsize) {
1122 err("submit_common_message: pipesize for pipe %lx is zero",
1123 pipe);
1124 return -1;
1125 }
1126
1127 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1128 err("sohci_submit_job failed");
1129 return -1;
1130 }
1131
1132 /* allow more time for a BULK device to react - some are slow */
1133 #define BULK_TO 5000 /* timeout in milliseconds */
1134 if (usb_pipebulk(pipe))
1135 timeout = BULK_TO;
1136 else
1137 timeout = 100;
1138
1139 /* wait for it to complete */
1140 for (;;) {
1141 /* check whether the controller is done */
1142 stat = hc_interrupt();
1143 if (stat < 0) {
1144 stat = USB_ST_CRC_ERR;
1145 break;
1146 }
1147
1148 /* NOTE: since we are not interrupt driven in U-Boot and always
1149 * handle only one URB at a time, we cannot assume the
1150 * transaction finished on the first successful return from
1151 * hc_interrupt().. unless the flag for current URB is set,
1152 * meaning that all TD's to/from device got actually
1153 * transferred and processed. If the current URB is not
1154 * finished we need to re-iterate this loop so as
1155 * hc_interrupt() gets called again as there needs to be some
1156 * more TD's to process still */
1157 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
1158 /* 0xff is returned for an SF-interrupt */
1159 break;
1160 }
1161
1162 if (--timeout) {
1163 mdelay(1);
1164 if (!urb_finished)
1165 dbg("\%");
1166
1167 } else {
1168 err("CTL:TIMEOUT ");
1169 dbg("submit_common_msg: TO status %x\n", stat);
1170 stat = USB_ST_CRC_ERR;
1171 urb_finished = 1;
1172 break;
1173 }
1174 }
1175 #if 0
1176 /* we got an Root Hub Status Change interrupt */
1177 if (got_rhsc) {
1178 #ifdef DEBUG
1179 ohci_dump_roothub (&gohci, 1);
1180 #endif
1181 got_rhsc = 0;
1182 /* abuse timeout */
1183 timeout = rh_check_port_status(&gohci);
1184 if (timeout >= 0) {
1185 #if 0 /* this does nothing useful, but leave it here in case that changes */
1186 /* the called routine adds 1 to the passed value */
1187 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1188 #endif
1189 /*
1190 * XXX
1191 * This is potentially dangerous because it assumes
1192 * that only one device is ever plugged in!
1193 */
1194 devgone = dev;
1195 }
1196 }
1197 #endif
1198
1199 dev->status = stat;
1200 dev->act_len = transfer_len;
1201
1202 #ifdef DEBUG
1203 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1204 #endif
1205
1206 /* free TDs in urb_priv */
1207 urb_free_priv (&urb_priv);
1208 return 0;
1209 }
1210
1211 /* submit routines called from usb.c */
1212 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1213 int transfer_len)
1214 {
1215 info("submit_bulk_msg");
1216 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1217 }
1218
1219 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1220 int transfer_len, struct devrequest *setup)
1221 {
1222 int maxsize = usb_maxpacket(dev, pipe);
1223
1224 info("submit_control_msg");
1225 #ifdef DEBUG
1226 urb_priv.actual_length = 0;
1227 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1228 #endif
1229 if (!maxsize) {
1230 err("submit_control_message: pipesize for pipe %lx is zero",
1231 pipe);
1232 return -1;
1233 }
1234 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1235 gohci.rh.dev = dev;
1236 /* root hub - redirect */
1237 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1238 setup);
1239 }
1240
1241 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1242 }
1243
1244 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1245 int transfer_len, int interval)
1246 {
1247 info("submit_int_msg");
1248 return -1;
1249 }
1250
1251 /*-------------------------------------------------------------------------*
1252 * HC functions
1253 *-------------------------------------------------------------------------*/
1254
1255 /* reset the HC and BUS */
1256
1257 static int hc_reset (ohci_t *ohci)
1258 {
1259 int timeout = 30;
1260 int smm_timeout = 50; /* 0,5 sec */
1261
1262 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1263 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1264 info("USB HC TakeOver from SMM");
1265 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1266 mdelay (10);
1267 if (--smm_timeout == 0) {
1268 err("USB HC TakeOver failed!");
1269 return -1;
1270 }
1271 }
1272 }
1273
1274 /* Disable HC interrupts */
1275 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1276
1277 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1278 ohci->slot_name,
1279 readl (&ohci->regs->control));
1280
1281 /* Reset USB (needed by some controllers) */
1282 ohci->hc_control = 0;
1283 writel (ohci->hc_control, &ohci->regs->control);
1284
1285 /* HC Reset requires max 10 us delay */
1286 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1287 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1288 if (--timeout == 0) {
1289 err("USB HC reset timed out!");
1290 return -1;
1291 }
1292 udelay (1);
1293 }
1294 return 0;
1295 }
1296
1297 /*-------------------------------------------------------------------------*/
1298
1299 /* Start an OHCI controller, set the BUS operational
1300 * enable interrupts
1301 * connect the virtual root hub */
1302
1303 static int hc_start (ohci_t * ohci)
1304 {
1305 __u32 mask;
1306 unsigned int fminterval;
1307
1308 ohci->disabled = 1;
1309
1310 /* Tell the controller where the control and bulk lists are
1311 * The lists are empty now. */
1312
1313 writel (0, &ohci->regs->ed_controlhead);
1314 writel (0, &ohci->regs->ed_bulkhead);
1315
1316 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1317
1318 fminterval = 0x2edf;
1319 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1320 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1321 writel (fminterval, &ohci->regs->fminterval);
1322 writel (0x628, &ohci->regs->lsthresh);
1323
1324 /* start controller operations */
1325 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1326 ohci->disabled = 0;
1327 writel (ohci->hc_control, &ohci->regs->control);
1328
1329 /* disable all interrupts */
1330 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1331 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1332 OHCI_INTR_OC | OHCI_INTR_MIE);
1333 writel (mask, &ohci->regs->intrdisable);
1334 /* clear all interrupts */
1335 mask &= ~OHCI_INTR_MIE;
1336 writel (mask, &ohci->regs->intrstatus);
1337 /* Choose the interrupts we care about now - but w/o MIE */
1338 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1339 writel (mask, &ohci->regs->intrenable);
1340
1341 #ifdef OHCI_USE_NPS
1342 /* required for AMD-756 and some Mac platforms */
1343 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1344 &ohci->regs->roothub.a);
1345 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1346 #endif /* OHCI_USE_NPS */
1347
1348 /* POTPGT delay is bits 24-31, in 2 ms units. */
1349 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1350
1351 /* connect the virtual root hub */
1352 ohci->rh.devnum = 0;
1353
1354 return 0;
1355 }
1356
1357 /*-------------------------------------------------------------------------*/
1358
1359 /* an interrupt happens */
1360
1361 static int
1362 hc_interrupt (void)
1363 {
1364 ohci_t *ohci = &gohci;
1365 struct ohci_regs *regs = ohci->regs;
1366 int ints;
1367 int stat = -1;
1368
1369 if ((ohci->hcca->done_head != 0) &&
1370 !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
1371
1372 ints = OHCI_INTR_WDH;
1373
1374 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1375 ohci->disabled++;
1376 err ("%s device removed!", ohci->slot_name);
1377 return -1;
1378
1379 } else if ((ints &= readl (&regs->intrenable)) == 0) {
1380 dbg("hc_interrupt: returning..\n");
1381 return 0xff;
1382 }
1383
1384 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1385
1386 if (ints & OHCI_INTR_RHSC) {
1387 got_rhsc = 1;
1388 stat = 0xff;
1389 }
1390
1391 if (ints & OHCI_INTR_UE) {
1392 ohci->disabled++;
1393 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1394 ohci->slot_name);
1395 /* e.g. due to PCI Master/Target Abort */
1396
1397 #ifdef DEBUG
1398 ohci_dump (ohci, 1);
1399 #endif
1400 /* FIXME: be optimistic, hope that bug won't repeat often. */
1401 /* Make some non-interrupt context restart the controller. */
1402 /* Count and limit the retries though; either hardware or */
1403 /* software errors can go forever... */
1404 hc_reset (ohci);
1405 return -1;
1406 }
1407
1408 if (ints & OHCI_INTR_WDH) {
1409 writel (OHCI_INTR_WDH, &regs->intrdisable);
1410 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1411 writel (OHCI_INTR_WDH, &regs->intrenable);
1412 }
1413
1414 if (ints & OHCI_INTR_SO) {
1415 dbg("USB Schedule overrun\n");
1416 writel (OHCI_INTR_SO, &regs->intrenable);
1417 stat = -1;
1418 }
1419
1420 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1421 if (ints & OHCI_INTR_SF) {
1422 unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
1423 mdelay(1);
1424 writel (OHCI_INTR_SF, &regs->intrdisable);
1425 if (ohci->ed_rm_list[frame] != NULL)
1426 writel (OHCI_INTR_SF, &regs->intrenable);
1427 stat = 0xff;
1428 }
1429
1430 writel (ints, &regs->intrstatus);
1431 return stat;
1432 }
1433
1434 /*-------------------------------------------------------------------------*/
1435
1436 /*-------------------------------------------------------------------------*/
1437
1438 /* De-allocate all resources.. */
1439
1440 static void hc_release_ohci (ohci_t *ohci)
1441 {
1442 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1443
1444 if (!ohci->disabled)
1445 hc_reset (ohci);
1446 }
1447
1448 /*-------------------------------------------------------------------------*/
1449
1450 /*
1451 * low level initalisation routine, called from usb.c
1452 */
1453 static char ohci_inited = 0;
1454
1455 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1456 {
1457 memset (&gohci, 0, sizeof (ohci_t));
1458 memset (&urb_priv, 0, sizeof (urb_priv_t));
1459
1460 /* align the storage */
1461 if ((__u32)&ghcca[0] & 0xff) {
1462 err("HCCA not aligned!!");
1463 return -1;
1464 }
1465 phcca = &ghcca[0];
1466 info("aligned ghcca %p", phcca);
1467 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1468 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1469 err("EDs not aligned!!");
1470 return -1;
1471 }
1472 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1473 if ((__u32)gtd & 0x7) {
1474 err("TDs not aligned!!");
1475 return -1;
1476 }
1477 ptd = gtd;
1478 gohci.hcca = phcca;
1479 memset (phcca, 0, sizeof (struct ohci_hcca));
1480
1481 gohci.disabled = 1;
1482 gohci.sleeping = 0;
1483 gohci.irq = -1;
1484 #if defined(CONFIG_440EP)
1485 gohci.regs = (struct ohci_regs *)(CONFIG_SYS_PERIPHERAL_BASE | 0x1000);
1486 #elif defined(CONFIG_440EPX) || defined(CONFIG_SYS_USB_HOST)
1487 gohci.regs = (struct ohci_regs *)(CONFIG_SYS_USB_HOST);
1488 #endif
1489
1490 gohci.flags = 0;
1491 gohci.slot_name = "ppc440";
1492
1493 if (hc_reset (&gohci) < 0) {
1494 hc_release_ohci (&gohci);
1495 return -1;
1496 }
1497
1498 if (hc_start (&gohci) < 0) {
1499 err ("can't start usb-%s", gohci.slot_name);
1500 hc_release_ohci (&gohci);
1501 return -1;
1502 }
1503
1504 #ifdef DEBUG
1505 ohci_dump (&gohci, 1);
1506 #endif
1507 ohci_inited = 1;
1508 urb_finished = 1;
1509
1510 return 0;
1511 }
1512
1513 int usb_lowlevel_stop(int index)
1514 {
1515 /* this gets called really early - before the controller has */
1516 /* even been initialized! */
1517 if (!ohci_inited)
1518 return 0;
1519 /* TODO release any interrupts, etc. */
1520 /* call hc_release_ohci() here ? */
1521 hc_reset (&gohci);
1522 return 0;
1523 }
1524
1525 #endif /* CONFIG_USB_OHCI */
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