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Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
[people/ms/u-boot.git] / arch / powerpc / cpu / ppc4xx / usb_ohci.c
1 /*
2 * URB OHCI HCD (Host Controller Driver) for USB on the PPC440EP.
3 *
4 * (C) Copyright 2003-2004
5 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
6 *
7 * (C) Copyright 2004
8 * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
9 *
10 * Note: Much of this code has been derived from Linux 2.4
11 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
12 * (C) Copyright 2000-2002 David Brownell
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33 /*
34 * IMPORTANT NOTES
35 * 1 - this driver is intended for use with USB Mass Storage Devices
36 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
37 */
38
39 #include <common.h>
40
41 #ifdef CONFIG_USB_OHCI
42
43 #include <malloc.h>
44 #include <usb.h>
45 #include "usb_ohci.h"
46
47 #define OHCI_USE_NPS /* force NoPowerSwitching mode */
48 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
49 #undef DEBUG
50 #undef SHOW_INFO
51 #undef OHCI_FILL_TRACE
52
53 /* For initializing controller (mask in an HCFS mode too) */
54 #define OHCI_CONTROL_INIT \
55 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
56
57 #define readl(a) (*((volatile u32 *)(a)))
58 #define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
59
60 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
61
62 #ifdef DEBUG
63 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
64 #else
65 #define dbg(format, arg...) do {} while(0)
66 #endif /* DEBUG */
67 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
68 #ifdef SHOW_INFO
69 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
70 #else
71 #define info(format, arg...) do {} while(0)
72 #endif
73
74 #define m16_swap(x) swap_16(x)
75 #define m32_swap(x) swap_32(x)
76
77 #if defined(CONFIG_405EZ) || defined(CONFIG_440EP) || defined(CONFIG_440EPX)
78 #define ohci_cpu_to_le16(x) (x)
79 #define ohci_cpu_to_le32(x) (x)
80 #else
81 #define ohci_cpu_to_le16(x) swap_16(x)
82 #define ohci_cpu_to_le32(x) swap_32(x)
83 #endif
84
85 /* global ohci_t */
86 static ohci_t gohci;
87 /* this must be aligned to a 256 byte boundary */
88 struct ohci_hcca ghcca[1];
89 /* a pointer to the aligned storage */
90 struct ohci_hcca *phcca;
91 /* this allocates EDs for all possible endpoints */
92 struct ohci_device ohci_dev;
93 /* urb_priv */
94 urb_priv_t urb_priv;
95 /* RHSC flag */
96 int got_rhsc;
97 /* device which was disconnected */
98 struct usb_device *devgone;
99 /* flag guarding URB transation */
100 int urb_finished = 0;
101
102 /*-------------------------------------------------------------------------*/
103
104 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
105 * The erratum (#4) description is incorrect. AMD's workaround waits
106 * till some bits (mostly reserved) are clear; ok for all revs.
107 */
108 #define OHCI_QUIRK_AMD756 0xabcd
109 #define read_roothub(hc, register, mask) ({ \
110 u32 temp = readl (&hc->regs->roothub.register); \
111 if (hc->flags & OHCI_QUIRK_AMD756) \
112 while (temp & mask) \
113 temp = readl (&hc->regs->roothub.register); \
114 temp; })
115
116 static u32 roothub_a (struct ohci *hc)
117 { return read_roothub (hc, a, 0xfc0fe000); }
118 static inline u32 roothub_b (struct ohci *hc)
119 { return readl (&hc->regs->roothub.b); }
120 static inline u32 roothub_status (struct ohci *hc)
121 { return readl (&hc->regs->roothub.status); }
122 static u32 roothub_portstatus (struct ohci *hc, int i)
123 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
124
125
126 /* forward declaration */
127 static int hc_interrupt (void);
128 static void
129 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
130 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
131
132 /*-------------------------------------------------------------------------*
133 * URB support functions
134 *-------------------------------------------------------------------------*/
135
136 /* free HCD-private data associated with this URB */
137
138 static void urb_free_priv (urb_priv_t * urb)
139 {
140 int i;
141 int last;
142 struct td * td;
143
144 last = urb->length - 1;
145 if (last >= 0) {
146 for (i = 0; i <= last; i++) {
147 td = urb->td[i];
148 if (td) {
149 td->usb_dev = NULL;
150 urb->td[i] = NULL;
151 }
152 }
153 }
154 }
155
156 /*-------------------------------------------------------------------------*/
157
158 #ifdef DEBUG
159 static int sohci_get_current_frame_number (struct usb_device * dev);
160
161 /* debug| print the main components of an URB
162 * small: 0) header + data packets 1) just header */
163
164 static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
165 int transfer_len, struct devrequest * setup, char * str, int small)
166 {
167 urb_priv_t * purb = &urb_priv;
168
169 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
170 str,
171 sohci_get_current_frame_number (dev),
172 usb_pipedevice (pipe),
173 usb_pipeendpoint (pipe),
174 usb_pipeout (pipe)? 'O': 'I',
175 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
176 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
177 purb->actual_length,
178 transfer_len, dev->status);
179 #ifdef OHCI_VERBOSE_DEBUG
180 if (!small) {
181 int i, len;
182
183 if (usb_pipecontrol (pipe)) {
184 printf (__FILE__ ": cmd(8):");
185 for (i = 0; i < 8 ; i++)
186 printf (" %02x", ((__u8 *) setup) [i]);
187 printf ("\n");
188 }
189 if (transfer_len > 0 && buffer) {
190 printf (__FILE__ ": data(%d/%d):",
191 purb->actual_length,
192 transfer_len);
193 len = usb_pipeout (pipe)?
194 transfer_len: purb->actual_length;
195 for (i = 0; i < 16 && i < len; i++)
196 printf (" %02x", ((__u8 *) buffer) [i]);
197 printf ("%s\n", i < len? "...": "");
198 }
199 }
200 #endif
201 }
202
203 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
204 void ep_print_int_eds (ohci_t *ohci, char * str) {
205 int i, j;
206 __u32 * ed_p;
207 for (i= 0; i < 32; i++) {
208 j = 5;
209 ed_p = &(ohci->hcca->int_table [i]);
210 if (*ed_p == 0)
211 continue;
212 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
213 while (*ed_p != 0 && j--) {
214 ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
215 printf (" ed: %4x;", ed->hwINFO);
216 ed_p = &ed->hwNextED;
217 }
218 printf ("\n");
219 }
220 }
221
222 static void ohci_dump_intr_mask (char *label, __u32 mask)
223 {
224 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
225 label,
226 mask,
227 (mask & OHCI_INTR_MIE) ? " MIE" : "",
228 (mask & OHCI_INTR_OC) ? " OC" : "",
229 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
230 (mask & OHCI_INTR_FNO) ? " FNO" : "",
231 (mask & OHCI_INTR_UE) ? " UE" : "",
232 (mask & OHCI_INTR_RD) ? " RD" : "",
233 (mask & OHCI_INTR_SF) ? " SF" : "",
234 (mask & OHCI_INTR_WDH) ? " WDH" : "",
235 (mask & OHCI_INTR_SO) ? " SO" : ""
236 );
237 }
238
239 static void maybe_print_eds (char *label, __u32 value)
240 {
241 ed_t *edp = (ed_t *)value;
242
243 if (value) {
244 dbg ("%s %08x", label, value);
245 dbg ("%08x", edp->hwINFO);
246 dbg ("%08x", edp->hwTailP);
247 dbg ("%08x", edp->hwHeadP);
248 dbg ("%08x", edp->hwNextED);
249 }
250 }
251
252 static char * hcfs2string (int state)
253 {
254 switch (state) {
255 case OHCI_USB_RESET: return "reset";
256 case OHCI_USB_RESUME: return "resume";
257 case OHCI_USB_OPER: return "operational";
258 case OHCI_USB_SUSPEND: return "suspend";
259 }
260 return "?";
261 }
262
263 /* dump control and status registers */
264 static void ohci_dump_status (ohci_t *controller)
265 {
266 struct ohci_regs *regs = controller->regs;
267 __u32 temp;
268
269 temp = readl (&regs->revision) & 0xff;
270 if (temp != 0x10)
271 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
272
273 temp = readl (&regs->control);
274 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
275 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
276 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
277 (temp & OHCI_CTRL_IR) ? " IR" : "",
278 hcfs2string (temp & OHCI_CTRL_HCFS),
279 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
280 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
281 (temp & OHCI_CTRL_IE) ? " IE" : "",
282 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
283 temp & OHCI_CTRL_CBSR
284 );
285
286 temp = readl (&regs->cmdstatus);
287 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
288 (temp & OHCI_SOC) >> 16,
289 (temp & OHCI_OCR) ? " OCR" : "",
290 (temp & OHCI_BLF) ? " BLF" : "",
291 (temp & OHCI_CLF) ? " CLF" : "",
292 (temp & OHCI_HCR) ? " HCR" : ""
293 );
294
295 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
296 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
297
298 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
299
300 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
301 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
302
303 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
304 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
305
306 maybe_print_eds ("donehead", readl (&regs->donehead));
307 }
308
309 static void ohci_dump_roothub (ohci_t *controller, int verbose)
310 {
311 __u32 temp, ndp, i;
312
313 temp = roothub_a (controller);
314 ndp = (temp & RH_A_NDP);
315
316 if (verbose) {
317 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
318 ((temp & RH_A_POTPGT) >> 24) & 0xff,
319 (temp & RH_A_NOCP) ? " NOCP" : "",
320 (temp & RH_A_OCPM) ? " OCPM" : "",
321 (temp & RH_A_DT) ? " DT" : "",
322 (temp & RH_A_NPS) ? " NPS" : "",
323 (temp & RH_A_PSM) ? " PSM" : "",
324 ndp
325 );
326 temp = roothub_b (controller);
327 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
328 temp,
329 (temp & RH_B_PPCM) >> 16,
330 (temp & RH_B_DR)
331 );
332 temp = roothub_status (controller);
333 dbg ("roothub.status: %08x%s%s%s%s%s%s",
334 temp,
335 (temp & RH_HS_CRWE) ? " CRWE" : "",
336 (temp & RH_HS_OCIC) ? " OCIC" : "",
337 (temp & RH_HS_LPSC) ? " LPSC" : "",
338 (temp & RH_HS_DRWE) ? " DRWE" : "",
339 (temp & RH_HS_OCI) ? " OCI" : "",
340 (temp & RH_HS_LPS) ? " LPS" : ""
341 );
342 }
343
344 for (i = 0; i < ndp; i++) {
345 temp = roothub_portstatus (controller, i);
346 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
347 i,
348 temp,
349 (temp & RH_PS_PRSC) ? " PRSC" : "",
350 (temp & RH_PS_OCIC) ? " OCIC" : "",
351 (temp & RH_PS_PSSC) ? " PSSC" : "",
352 (temp & RH_PS_PESC) ? " PESC" : "",
353 (temp & RH_PS_CSC) ? " CSC" : "",
354
355 (temp & RH_PS_LSDA) ? " LSDA" : "",
356 (temp & RH_PS_PPS) ? " PPS" : "",
357 (temp & RH_PS_PRS) ? " PRS" : "",
358 (temp & RH_PS_POCI) ? " POCI" : "",
359 (temp & RH_PS_PSS) ? " PSS" : "",
360
361 (temp & RH_PS_PES) ? " PES" : "",
362 (temp & RH_PS_CCS) ? " CCS" : ""
363 );
364 }
365 }
366
367 static void ohci_dump (ohci_t *controller, int verbose)
368 {
369 dbg ("OHCI controller usb-%s state", controller->slot_name);
370
371 /* dumps some of the state we know about */
372 ohci_dump_status (controller);
373 if (verbose)
374 ep_print_int_eds (controller, "hcca");
375 dbg ("hcca frame #%04x", controller->hcca->frame_no);
376 ohci_dump_roothub (controller, 1);
377 }
378
379
380 #endif /* DEBUG */
381
382 /*-------------------------------------------------------------------------*
383 * Interface functions (URB)
384 *-------------------------------------------------------------------------*/
385
386 /* get a transfer request */
387
388 int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
389 int transfer_len, struct devrequest *setup, int interval)
390 {
391 ohci_t *ohci;
392 ed_t * ed;
393 urb_priv_t *purb_priv;
394 int i, size = 0;
395
396 ohci = &gohci;
397
398 /* when controller's hung, permit only roothub cleanup attempts
399 * such as powering down ports */
400 if (ohci->disabled) {
401 err("sohci_submit_job: EPIPE");
402 return -1;
403 }
404
405 /* if we have an unfinished URB from previous transaction let's
406 * fail and scream as quickly as possible so as not to corrupt
407 * further communication */
408 if (!urb_finished) {
409 err("sohci_submit_job: URB NOT FINISHED");
410 return -1;
411 }
412 /* we're about to begin a new transaction here so mark the URB unfinished */
413 urb_finished = 0;
414
415 /* every endpoint has a ed, locate and fill it */
416 if (!(ed = ep_add_ed (dev, pipe))) {
417 err("sohci_submit_job: ENOMEM");
418 return -1;
419 }
420
421 /* for the private part of the URB we need the number of TDs (size) */
422 switch (usb_pipetype (pipe)) {
423 case PIPE_BULK: /* one TD for every 4096 Byte */
424 size = (transfer_len - 1) / 4096 + 1;
425 break;
426 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
427 size = (transfer_len == 0)? 2:
428 (transfer_len - 1) / 4096 + 3;
429 break;
430 }
431
432 if (size >= (N_URB_TD - 1)) {
433 err("need %d TDs, only have %d", size, N_URB_TD);
434 return -1;
435 }
436 purb_priv = &urb_priv;
437 purb_priv->pipe = pipe;
438
439 /* fill the private part of the URB */
440 purb_priv->length = size;
441 purb_priv->ed = ed;
442 purb_priv->actual_length = 0;
443
444 /* allocate the TDs */
445 /* note that td[0] was allocated in ep_add_ed */
446 for (i = 0; i < size; i++) {
447 purb_priv->td[i] = td_alloc (dev);
448 if (!purb_priv->td[i]) {
449 purb_priv->length = i;
450 urb_free_priv (purb_priv);
451 err("sohci_submit_job: ENOMEM");
452 return -1;
453 }
454 }
455
456 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
457 urb_free_priv (purb_priv);
458 err("sohci_submit_job: EINVAL");
459 return -1;
460 }
461
462 /* link the ed into a chain if is not already */
463 if (ed->state != ED_OPER)
464 ep_link (ohci, ed);
465
466 /* fill the TDs and link it to the ed */
467 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
468
469 return 0;
470 }
471
472 /*-------------------------------------------------------------------------*/
473
474 #ifdef DEBUG
475 /* tell us the current USB frame number */
476
477 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
478 {
479 ohci_t *ohci = &gohci;
480
481 return ohci_cpu_to_le16 (ohci->hcca->frame_no);
482 }
483 #endif
484
485 /*-------------------------------------------------------------------------*
486 * ED handling functions
487 *-------------------------------------------------------------------------*/
488
489 /* link an ed into one of the HC chains */
490
491 static int ep_link (ohci_t *ohci, ed_t *edi)
492 {
493 volatile ed_t *ed = edi;
494
495 ed->state = ED_OPER;
496
497 switch (ed->type) {
498 case PIPE_CONTROL:
499 ed->hwNextED = 0;
500 if (ohci->ed_controltail == NULL) {
501 writel (ed, &ohci->regs->ed_controlhead);
502 } else {
503 ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
504 }
505 ed->ed_prev = ohci->ed_controltail;
506 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
507 !ohci->ed_rm_list[1] && !ohci->sleeping) {
508 ohci->hc_control |= OHCI_CTRL_CLE;
509 writel (ohci->hc_control, &ohci->regs->control);
510 }
511 ohci->ed_controltail = edi;
512 break;
513
514 case PIPE_BULK:
515 ed->hwNextED = 0;
516 if (ohci->ed_bulktail == NULL) {
517 writel (ed, &ohci->regs->ed_bulkhead);
518 } else {
519 ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
520 }
521 ed->ed_prev = ohci->ed_bulktail;
522 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
523 !ohci->ed_rm_list[1] && !ohci->sleeping) {
524 ohci->hc_control |= OHCI_CTRL_BLE;
525 writel (ohci->hc_control, &ohci->regs->control);
526 }
527 ohci->ed_bulktail = edi;
528 break;
529 }
530 return 0;
531 }
532
533 /*-------------------------------------------------------------------------*/
534
535 /* unlink an ed from one of the HC chains.
536 * just the link to the ed is unlinked.
537 * the link from the ed still points to another operational ed or 0
538 * so the HC can eventually finish the processing of the unlinked ed */
539
540 static int ep_unlink (ohci_t *ohci, ed_t *edi)
541 {
542 volatile ed_t *ed = edi;
543
544 ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
545
546 switch (ed->type) {
547 case PIPE_CONTROL:
548 if (ed->ed_prev == NULL) {
549 if (!ed->hwNextED) {
550 ohci->hc_control &= ~OHCI_CTRL_CLE;
551 writel (ohci->hc_control, &ohci->regs->control);
552 }
553 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
554 } else {
555 ed->ed_prev->hwNextED = ed->hwNextED;
556 }
557 if (ohci->ed_controltail == ed) {
558 ohci->ed_controltail = ed->ed_prev;
559 } else {
560 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
561 }
562 break;
563
564 case PIPE_BULK:
565 if (ed->ed_prev == NULL) {
566 if (!ed->hwNextED) {
567 ohci->hc_control &= ~OHCI_CTRL_BLE;
568 writel (ohci->hc_control, &ohci->regs->control);
569 }
570 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
571 } else {
572 ed->ed_prev->hwNextED = ed->hwNextED;
573 }
574 if (ohci->ed_bulktail == ed) {
575 ohci->ed_bulktail = ed->ed_prev;
576 } else {
577 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
578 }
579 break;
580 }
581 ed->state = ED_UNLINK;
582 return 0;
583 }
584
585
586 /*-------------------------------------------------------------------------*/
587
588 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
589 * but the USB stack is a little bit stateless so we do it at every transaction
590 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
591 * in all other cases the state is left unchanged
592 * the ed info fields are setted anyway even though most of them should not change */
593
594 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
595 {
596 td_t *td;
597 ed_t *ed_ret;
598 volatile ed_t *ed;
599
600 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
601 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
602
603 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
604 err("ep_add_ed: pending delete");
605 /* pending delete request */
606 return NULL;
607 }
608
609 if (ed->state == ED_NEW) {
610 ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
611 /* dummy td; end of td list for ed */
612 td = td_alloc (usb_dev);
613 ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
614 ed->hwHeadP = ed->hwTailP;
615 ed->state = ED_UNLINK;
616 ed->type = usb_pipetype (pipe);
617 ohci_dev.ed_cnt++;
618 }
619
620 ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
621 | usb_pipeendpoint (pipe) << 7
622 | (usb_pipeisoc (pipe)? 0x8000: 0)
623 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
624 | usb_pipeslow (pipe) << 13
625 | usb_maxpacket (usb_dev, pipe) << 16);
626
627 return ed_ret;
628 }
629
630 /*-------------------------------------------------------------------------*
631 * TD handling functions
632 *-------------------------------------------------------------------------*/
633
634 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
635
636 static void td_fill (ohci_t *ohci, unsigned int info,
637 void *data, int len,
638 struct usb_device *dev, int index, urb_priv_t *urb_priv)
639 {
640 volatile td_t *td, *td_pt;
641 #ifdef OHCI_FILL_TRACE
642 int i;
643 #endif
644
645 if (index > urb_priv->length) {
646 err("index > length");
647 return;
648 }
649 /* use this td as the next dummy */
650 td_pt = urb_priv->td [index];
651 td_pt->hwNextTD = 0;
652
653 /* fill the old dummy TD */
654 td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
655
656 td->ed = urb_priv->ed;
657 td->next_dl_td = NULL;
658 td->index = index;
659 td->data = (__u32)data;
660 #ifdef OHCI_FILL_TRACE
661 if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
662 for (i = 0; i < len; i++)
663 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
664 printf("\n");
665 }
666 #endif
667 if (!len)
668 data = 0;
669
670 td->hwINFO = ohci_cpu_to_le32 (info);
671 td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
672 if (data)
673 td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
674 else
675 td->hwBE = 0;
676 td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
677
678 /* append to queue */
679 td->ed->hwTailP = td->hwNextTD;
680 }
681
682 /*-------------------------------------------------------------------------*/
683
684 /* prepare all TDs of a transfer */
685 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
686 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
687 {
688 ohci_t *ohci = &gohci;
689 int data_len = transfer_len;
690 void *data;
691 int cnt = 0;
692 __u32 info = 0;
693 unsigned int toggle = 0;
694
695 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
696 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
697 toggle = TD_T_TOGGLE;
698 } else {
699 toggle = TD_T_DATA0;
700 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
701 }
702 urb->td_cnt = 0;
703 if (data_len)
704 data = buffer;
705 else
706 data = 0;
707
708 switch (usb_pipetype (pipe)) {
709 case PIPE_BULK:
710 info = usb_pipeout (pipe)?
711 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
712 while(data_len > 4096) {
713 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
714 data += 4096; data_len -= 4096; cnt++;
715 }
716 info = usb_pipeout (pipe)?
717 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
718 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
719 cnt++;
720
721 if (!ohci->sleeping)
722 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
723 break;
724
725 case PIPE_CONTROL:
726 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
727 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
728 if (data_len > 0) {
729 info = usb_pipeout (pipe)?
730 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
731 /* NOTE: mishandles transfers >8K, some >4K */
732 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
733 }
734 info = usb_pipeout (pipe)?
735 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
736 td_fill (ohci, info, data, 0, dev, cnt++, urb);
737 if (!ohci->sleeping)
738 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
739 break;
740 }
741 if (urb->length != cnt)
742 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
743 }
744
745 /*-------------------------------------------------------------------------*
746 * Done List handling functions
747 *-------------------------------------------------------------------------*/
748
749
750 /* calculate the transfer length and update the urb */
751
752 static void dl_transfer_length(td_t * td)
753 {
754 __u32 tdBE, tdCBP;
755 urb_priv_t *lurb_priv = &urb_priv;
756
757 tdBE = ohci_cpu_to_le32 (td->hwBE);
758 tdCBP = ohci_cpu_to_le32 (td->hwCBP);
759
760
761 if (!(usb_pipecontrol(lurb_priv->pipe) &&
762 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
763 if (tdBE != 0) {
764 if (td->hwCBP == 0)
765 lurb_priv->actual_length += tdBE - td->data + 1;
766 else
767 lurb_priv->actual_length += tdCBP - td->data;
768 }
769 }
770 }
771
772 /*-------------------------------------------------------------------------*/
773
774 /* replies to the request have to be on a FIFO basis so
775 * we reverse the reversed done-list */
776
777 static td_t * dl_reverse_done_list (ohci_t *ohci)
778 {
779 __u32 td_list_hc;
780 td_t *td_rev = NULL;
781 td_t *td_list = NULL;
782 urb_priv_t *lurb_priv = NULL;
783
784 td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
785 ohci->hcca->done_head = 0;
786
787 while (td_list_hc) {
788 td_list = (td_t *)td_list_hc;
789
790 if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
791 lurb_priv = &urb_priv;
792 dbg(" USB-error/status: %x : %p",
793 TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
794 if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
795 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
796 td_list->ed->hwHeadP =
797 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
798 (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
799 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
800 } else
801 td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
802 }
803 #ifdef CONFIG_MPC5200
804 td_list->hwNextTD = 0;
805 #endif
806 }
807
808 td_list->next_dl_td = td_rev;
809 td_rev = td_list;
810 td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
811 }
812 return td_list;
813 }
814
815 /*-------------------------------------------------------------------------*/
816
817 /* td done list */
818 static int dl_done_list (ohci_t *ohci, td_t *td_list)
819 {
820 td_t *td_list_next = NULL;
821 ed_t *ed;
822 int cc = 0;
823 int stat = 0;
824 /* urb_t *urb; */
825 urb_priv_t *lurb_priv;
826 __u32 tdINFO, edHeadP, edTailP;
827
828 while (td_list) {
829 td_list_next = td_list->next_dl_td;
830
831 lurb_priv = &urb_priv;
832 tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
833
834 ed = td_list->ed;
835
836 dl_transfer_length(td_list);
837
838 /* error code of transfer */
839 cc = TD_CC_GET (tdINFO);
840 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
841 if ((ed->state & (ED_OPER | ED_UNLINK))
842 && (lurb_priv->state != URB_DEL)) {
843 dbg("ConditionCode %#x", cc);
844 stat = cc_to_error[cc];
845 urb_finished = 1;
846 }
847 }
848
849 if (ed->state != ED_NEW) {
850 edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
851 edTailP = ohci_cpu_to_le32 (ed->hwTailP);
852
853 /* unlink eds if they are not busy */
854 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
855 ep_unlink (ohci, ed);
856 }
857
858 td_list = td_list_next;
859 }
860 return stat;
861 }
862
863 /*-------------------------------------------------------------------------*
864 * Virtual Root Hub
865 *-------------------------------------------------------------------------*/
866
867 /* Device descriptor */
868 static __u8 root_hub_dev_des[] =
869 {
870 0x12, /* __u8 bLength; */
871 0x01, /* __u8 bDescriptorType; Device */
872 0x10, /* __u16 bcdUSB; v1.1 */
873 0x01,
874 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
875 0x00, /* __u8 bDeviceSubClass; */
876 0x00, /* __u8 bDeviceProtocol; */
877 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
878 0x00, /* __u16 idVendor; */
879 0x00,
880 0x00, /* __u16 idProduct; */
881 0x00,
882 0x00, /* __u16 bcdDevice; */
883 0x00,
884 0x00, /* __u8 iManufacturer; */
885 0x01, /* __u8 iProduct; */
886 0x00, /* __u8 iSerialNumber; */
887 0x01 /* __u8 bNumConfigurations; */
888 };
889
890
891 /* Configuration descriptor */
892 static __u8 root_hub_config_des[] =
893 {
894 0x09, /* __u8 bLength; */
895 0x02, /* __u8 bDescriptorType; Configuration */
896 0x19, /* __u16 wTotalLength; */
897 0x00,
898 0x01, /* __u8 bNumInterfaces; */
899 0x01, /* __u8 bConfigurationValue; */
900 0x00, /* __u8 iConfiguration; */
901 0x40, /* __u8 bmAttributes;
902 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
903 0x00, /* __u8 MaxPower; */
904
905 /* interface */
906 0x09, /* __u8 if_bLength; */
907 0x04, /* __u8 if_bDescriptorType; Interface */
908 0x00, /* __u8 if_bInterfaceNumber; */
909 0x00, /* __u8 if_bAlternateSetting; */
910 0x01, /* __u8 if_bNumEndpoints; */
911 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
912 0x00, /* __u8 if_bInterfaceSubClass; */
913 0x00, /* __u8 if_bInterfaceProtocol; */
914 0x00, /* __u8 if_iInterface; */
915
916 /* endpoint */
917 0x07, /* __u8 ep_bLength; */
918 0x05, /* __u8 ep_bDescriptorType; Endpoint */
919 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
920 0x03, /* __u8 ep_bmAttributes; Interrupt */
921 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
922 0x00,
923 0xff /* __u8 ep_bInterval; 255 ms */
924 };
925
926 static unsigned char root_hub_str_index0[] =
927 {
928 0x04, /* __u8 bLength; */
929 0x03, /* __u8 bDescriptorType; String-descriptor */
930 0x09, /* __u8 lang ID */
931 0x04, /* __u8 lang ID */
932 };
933
934 static unsigned char root_hub_str_index1[] =
935 {
936 28, /* __u8 bLength; */
937 0x03, /* __u8 bDescriptorType; String-descriptor */
938 'O', /* __u8 Unicode */
939 0, /* __u8 Unicode */
940 'H', /* __u8 Unicode */
941 0, /* __u8 Unicode */
942 'C', /* __u8 Unicode */
943 0, /* __u8 Unicode */
944 'I', /* __u8 Unicode */
945 0, /* __u8 Unicode */
946 ' ', /* __u8 Unicode */
947 0, /* __u8 Unicode */
948 'R', /* __u8 Unicode */
949 0, /* __u8 Unicode */
950 'o', /* __u8 Unicode */
951 0, /* __u8 Unicode */
952 'o', /* __u8 Unicode */
953 0, /* __u8 Unicode */
954 't', /* __u8 Unicode */
955 0, /* __u8 Unicode */
956 ' ', /* __u8 Unicode */
957 0, /* __u8 Unicode */
958 'H', /* __u8 Unicode */
959 0, /* __u8 Unicode */
960 'u', /* __u8 Unicode */
961 0, /* __u8 Unicode */
962 'b', /* __u8 Unicode */
963 0, /* __u8 Unicode */
964 };
965
966 /* Hub class-specific descriptor is constructed dynamically */
967
968
969 /*-------------------------------------------------------------------------*/
970
971 #define OK(x) len = (x); break
972 #ifdef DEBUG
973 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
974 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
975 #else
976 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
977 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
978 #endif
979 #define RD_RH_STAT roothub_status(&gohci)
980 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
981
982 /* request to virtual root hub */
983
984 int rh_check_port_status(ohci_t *controller)
985 {
986 __u32 temp, ndp, i;
987 int res;
988
989 res = -1;
990 temp = roothub_a (controller);
991 ndp = (temp & RH_A_NDP);
992 for (i = 0; i < ndp; i++) {
993 temp = roothub_portstatus (controller, i);
994 /* check for a device disconnect */
995 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
996 (RH_PS_PESC | RH_PS_CSC)) &&
997 ((temp & RH_PS_CCS) == 0)) {
998 res = i;
999 break;
1000 }
1001 }
1002 return res;
1003 }
1004
1005 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1006 void *buffer, int transfer_len, struct devrequest *cmd)
1007 {
1008 void * data = buffer;
1009 int leni = transfer_len;
1010 int len = 0;
1011 int stat = 0;
1012 __u32 datab[4];
1013 __u8 *data_buf = (__u8 *)datab;
1014 __u16 bmRType_bReq;
1015 __u16 wValue;
1016 __u16 wIndex;
1017 __u16 wLength;
1018
1019 #ifdef DEBUG
1020 urb_priv.actual_length = 0;
1021 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1022 #endif
1023 if (usb_pipeint(pipe)) {
1024 info("Root-Hub submit IRQ: NOT implemented");
1025 return 0;
1026 }
1027
1028 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1029 wValue = m16_swap (cmd->value);
1030 wIndex = m16_swap (cmd->index);
1031 wLength = m16_swap (cmd->length);
1032
1033 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1034 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1035
1036 switch (bmRType_bReq) {
1037 /* Request Destination:
1038 without flags: Device,
1039 RH_INTERFACE: interface,
1040 RH_ENDPOINT: endpoint,
1041 RH_CLASS means HUB here,
1042 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1043 */
1044
1045 case RH_GET_STATUS:
1046 *(__u16 *) data_buf = m16_swap (1); OK (2);
1047 case RH_GET_STATUS | RH_INTERFACE:
1048 *(__u16 *) data_buf = m16_swap (0); OK (2);
1049 case RH_GET_STATUS | RH_ENDPOINT:
1050 *(__u16 *) data_buf = m16_swap (0); OK (2);
1051 case RH_GET_STATUS | RH_CLASS:
1052 *(__u32 *) data_buf = m32_swap (
1053 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1054 OK (4);
1055 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1056 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1057
1058 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1059 switch (wValue) {
1060 case (RH_ENDPOINT_STALL): OK (0);
1061 }
1062 break;
1063
1064 case RH_CLEAR_FEATURE | RH_CLASS:
1065 switch (wValue) {
1066 case RH_C_HUB_LOCAL_POWER:
1067 OK(0);
1068 case (RH_C_HUB_OVER_CURRENT):
1069 WR_RH_STAT(RH_HS_OCIC); OK (0);
1070 }
1071 break;
1072
1073 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1074 switch (wValue) {
1075 case (RH_PORT_ENABLE):
1076 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1077 case (RH_PORT_SUSPEND):
1078 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1079 case (RH_PORT_POWER):
1080 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1081 case (RH_C_PORT_CONNECTION):
1082 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1083 case (RH_C_PORT_ENABLE):
1084 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1085 case (RH_C_PORT_SUSPEND):
1086 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1087 case (RH_C_PORT_OVER_CURRENT):
1088 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1089 case (RH_C_PORT_RESET):
1090 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1091 }
1092 break;
1093
1094 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1095 switch (wValue) {
1096 case (RH_PORT_SUSPEND):
1097 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1098 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1099 if (RD_RH_PORTSTAT & RH_PS_CCS)
1100 WR_RH_PORTSTAT (RH_PS_PRS);
1101 OK (0);
1102 case (RH_PORT_POWER):
1103 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1104 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1105 if (RD_RH_PORTSTAT & RH_PS_CCS)
1106 WR_RH_PORTSTAT (RH_PS_PES );
1107 OK (0);
1108 }
1109 break;
1110
1111 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1112
1113 case RH_GET_DESCRIPTOR:
1114 switch ((wValue & 0xff00) >> 8) {
1115 case (0x01): /* device descriptor */
1116 len = min_t(unsigned int,
1117 leni,
1118 min_t(unsigned int,
1119 sizeof (root_hub_dev_des),
1120 wLength));
1121 data_buf = root_hub_dev_des; OK(len);
1122 case (0x02): /* configuration descriptor */
1123 len = min_t(unsigned int,
1124 leni,
1125 min_t(unsigned int,
1126 sizeof (root_hub_config_des),
1127 wLength));
1128 data_buf = root_hub_config_des; OK(len);
1129 case (0x03): /* string descriptors */
1130 if(wValue==0x0300) {
1131 len = min_t(unsigned int,
1132 leni,
1133 min_t(unsigned int,
1134 sizeof (root_hub_str_index0),
1135 wLength));
1136 data_buf = root_hub_str_index0;
1137 OK(len);
1138 }
1139 if(wValue==0x0301) {
1140 len = min_t(unsigned int,
1141 leni,
1142 min_t(unsigned int,
1143 sizeof (root_hub_str_index1),
1144 wLength));
1145 data_buf = root_hub_str_index1;
1146 OK(len);
1147 }
1148 default:
1149 stat = USB_ST_STALLED;
1150 }
1151 break;
1152
1153 case RH_GET_DESCRIPTOR | RH_CLASS:
1154 {
1155 __u32 temp = roothub_a (&gohci);
1156
1157 data_buf [0] = 9; /* min length; */
1158 data_buf [1] = 0x29;
1159 data_buf [2] = temp & RH_A_NDP;
1160 data_buf [3] = 0;
1161 if (temp & RH_A_PSM) /* per-port power switching? */
1162 data_buf [3] |= 0x1;
1163 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1164 data_buf [3] |= 0x10;
1165 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1166 data_buf [3] |= 0x8;
1167
1168 /* corresponds to data_buf[4-7] */
1169 datab [1] = 0;
1170 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1171 temp = roothub_b (&gohci);
1172 data_buf [7] = temp & RH_B_DR;
1173 if (data_buf [2] < 7) {
1174 data_buf [8] = 0xff;
1175 } else {
1176 data_buf [0] += 2;
1177 data_buf [8] = (temp & RH_B_DR) >> 8;
1178 data_buf [10] = data_buf [9] = 0xff;
1179 }
1180
1181 len = min_t(unsigned int, leni,
1182 min_t(unsigned int, data_buf [0], wLength));
1183 OK (len);
1184 }
1185
1186 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1187
1188 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1189
1190 default:
1191 dbg ("unsupported root hub command");
1192 stat = USB_ST_STALLED;
1193 }
1194
1195 #ifdef DEBUG
1196 ohci_dump_roothub (&gohci, 1);
1197 #endif
1198
1199 len = min_t(int, len, leni);
1200 if (data != data_buf)
1201 memcpy (data, data_buf, len);
1202 dev->act_len = len;
1203 dev->status = stat;
1204
1205 #ifdef DEBUG
1206 if (transfer_len)
1207 urb_priv.actual_length = transfer_len;
1208 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1209 #endif
1210
1211 return stat;
1212 }
1213
1214 /*-------------------------------------------------------------------------*/
1215
1216 /* common code for handling submit messages - used for all but root hub */
1217 /* accesses. */
1218 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1219 int transfer_len, struct devrequest *setup, int interval)
1220 {
1221 int stat = 0;
1222 int maxsize = usb_maxpacket(dev, pipe);
1223 int timeout;
1224
1225 /* device pulled? Shortcut the action. */
1226 if (devgone == dev) {
1227 dev->status = USB_ST_CRC_ERR;
1228 return 0;
1229 }
1230
1231 #ifdef DEBUG
1232 urb_priv.actual_length = 0;
1233 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1234 #endif
1235 if (!maxsize) {
1236 err("submit_common_message: pipesize for pipe %lx is zero",
1237 pipe);
1238 return -1;
1239 }
1240
1241 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1242 err("sohci_submit_job failed");
1243 return -1;
1244 }
1245
1246 /* allow more time for a BULK device to react - some are slow */
1247 #define BULK_TO 5000 /* timeout in milliseconds */
1248 if (usb_pipebulk(pipe))
1249 timeout = BULK_TO;
1250 else
1251 timeout = 100;
1252
1253 /* wait for it to complete */
1254 for (;;) {
1255 /* check whether the controller is done */
1256 stat = hc_interrupt();
1257 if (stat < 0) {
1258 stat = USB_ST_CRC_ERR;
1259 break;
1260 }
1261
1262 /* NOTE: since we are not interrupt driven in U-Boot and always
1263 * handle only one URB at a time, we cannot assume the
1264 * transaction finished on the first successful return from
1265 * hc_interrupt().. unless the flag for current URB is set,
1266 * meaning that all TD's to/from device got actually
1267 * transferred and processed. If the current URB is not
1268 * finished we need to re-iterate this loop so as
1269 * hc_interrupt() gets called again as there needs to be some
1270 * more TD's to process still */
1271 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
1272 /* 0xff is returned for an SF-interrupt */
1273 break;
1274 }
1275
1276 if (--timeout) {
1277 wait_ms(1);
1278 if (!urb_finished)
1279 dbg("\%");
1280
1281 } else {
1282 err("CTL:TIMEOUT ");
1283 dbg("submit_common_msg: TO status %x\n", stat);
1284 stat = USB_ST_CRC_ERR;
1285 urb_finished = 1;
1286 break;
1287 }
1288 }
1289 #if 0
1290 /* we got an Root Hub Status Change interrupt */
1291 if (got_rhsc) {
1292 #ifdef DEBUG
1293 ohci_dump_roothub (&gohci, 1);
1294 #endif
1295 got_rhsc = 0;
1296 /* abuse timeout */
1297 timeout = rh_check_port_status(&gohci);
1298 if (timeout >= 0) {
1299 #if 0 /* this does nothing useful, but leave it here in case that changes */
1300 /* the called routine adds 1 to the passed value */
1301 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1302 #endif
1303 /*
1304 * XXX
1305 * This is potentially dangerous because it assumes
1306 * that only one device is ever plugged in!
1307 */
1308 devgone = dev;
1309 }
1310 }
1311 #endif
1312
1313 dev->status = stat;
1314 dev->act_len = transfer_len;
1315
1316 #ifdef DEBUG
1317 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1318 #endif
1319
1320 /* free TDs in urb_priv */
1321 urb_free_priv (&urb_priv);
1322 return 0;
1323 }
1324
1325 /* submit routines called from usb.c */
1326 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1327 int transfer_len)
1328 {
1329 info("submit_bulk_msg");
1330 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1331 }
1332
1333 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1334 int transfer_len, struct devrequest *setup)
1335 {
1336 int maxsize = usb_maxpacket(dev, pipe);
1337
1338 info("submit_control_msg");
1339 #ifdef DEBUG
1340 urb_priv.actual_length = 0;
1341 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1342 #endif
1343 if (!maxsize) {
1344 err("submit_control_message: pipesize for pipe %lx is zero",
1345 pipe);
1346 return -1;
1347 }
1348 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1349 gohci.rh.dev = dev;
1350 /* root hub - redirect */
1351 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1352 setup);
1353 }
1354
1355 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1356 }
1357
1358 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1359 int transfer_len, int interval)
1360 {
1361 info("submit_int_msg");
1362 return -1;
1363 }
1364
1365 /*-------------------------------------------------------------------------*
1366 * HC functions
1367 *-------------------------------------------------------------------------*/
1368
1369 /* reset the HC and BUS */
1370
1371 static int hc_reset (ohci_t *ohci)
1372 {
1373 int timeout = 30;
1374 int smm_timeout = 50; /* 0,5 sec */
1375
1376 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1377 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1378 info("USB HC TakeOver from SMM");
1379 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1380 wait_ms (10);
1381 if (--smm_timeout == 0) {
1382 err("USB HC TakeOver failed!");
1383 return -1;
1384 }
1385 }
1386 }
1387
1388 /* Disable HC interrupts */
1389 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1390
1391 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1392 ohci->slot_name,
1393 readl (&ohci->regs->control));
1394
1395 /* Reset USB (needed by some controllers) */
1396 ohci->hc_control = 0;
1397 writel (ohci->hc_control, &ohci->regs->control);
1398
1399 /* HC Reset requires max 10 us delay */
1400 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1401 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1402 if (--timeout == 0) {
1403 err("USB HC reset timed out!");
1404 return -1;
1405 }
1406 udelay (1);
1407 }
1408 return 0;
1409 }
1410
1411 /*-------------------------------------------------------------------------*/
1412
1413 /* Start an OHCI controller, set the BUS operational
1414 * enable interrupts
1415 * connect the virtual root hub */
1416
1417 static int hc_start (ohci_t * ohci)
1418 {
1419 __u32 mask;
1420 unsigned int fminterval;
1421
1422 ohci->disabled = 1;
1423
1424 /* Tell the controller where the control and bulk lists are
1425 * The lists are empty now. */
1426
1427 writel (0, &ohci->regs->ed_controlhead);
1428 writel (0, &ohci->regs->ed_bulkhead);
1429
1430 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1431
1432 fminterval = 0x2edf;
1433 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1434 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1435 writel (fminterval, &ohci->regs->fminterval);
1436 writel (0x628, &ohci->regs->lsthresh);
1437
1438 /* start controller operations */
1439 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1440 ohci->disabled = 0;
1441 writel (ohci->hc_control, &ohci->regs->control);
1442
1443 /* disable all interrupts */
1444 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1445 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1446 OHCI_INTR_OC | OHCI_INTR_MIE);
1447 writel (mask, &ohci->regs->intrdisable);
1448 /* clear all interrupts */
1449 mask &= ~OHCI_INTR_MIE;
1450 writel (mask, &ohci->regs->intrstatus);
1451 /* Choose the interrupts we care about now - but w/o MIE */
1452 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1453 writel (mask, &ohci->regs->intrenable);
1454
1455 #ifdef OHCI_USE_NPS
1456 /* required for AMD-756 and some Mac platforms */
1457 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1458 &ohci->regs->roothub.a);
1459 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1460 #endif /* OHCI_USE_NPS */
1461
1462 /* POTPGT delay is bits 24-31, in 2 ms units. */
1463 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1464
1465 /* connect the virtual root hub */
1466 ohci->rh.devnum = 0;
1467
1468 return 0;
1469 }
1470
1471 /*-------------------------------------------------------------------------*/
1472
1473 /* an interrupt happens */
1474
1475 static int
1476 hc_interrupt (void)
1477 {
1478 ohci_t *ohci = &gohci;
1479 struct ohci_regs *regs = ohci->regs;
1480 int ints;
1481 int stat = -1;
1482
1483 if ((ohci->hcca->done_head != 0) &&
1484 !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
1485
1486 ints = OHCI_INTR_WDH;
1487
1488 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1489 ohci->disabled++;
1490 err ("%s device removed!", ohci->slot_name);
1491 return -1;
1492
1493 } else if ((ints &= readl (&regs->intrenable)) == 0) {
1494 dbg("hc_interrupt: returning..\n");
1495 return 0xff;
1496 }
1497
1498 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1499
1500 if (ints & OHCI_INTR_RHSC) {
1501 got_rhsc = 1;
1502 stat = 0xff;
1503 }
1504
1505 if (ints & OHCI_INTR_UE) {
1506 ohci->disabled++;
1507 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1508 ohci->slot_name);
1509 /* e.g. due to PCI Master/Target Abort */
1510
1511 #ifdef DEBUG
1512 ohci_dump (ohci, 1);
1513 #endif
1514 /* FIXME: be optimistic, hope that bug won't repeat often. */
1515 /* Make some non-interrupt context restart the controller. */
1516 /* Count and limit the retries though; either hardware or */
1517 /* software errors can go forever... */
1518 hc_reset (ohci);
1519 return -1;
1520 }
1521
1522 if (ints & OHCI_INTR_WDH) {
1523 writel (OHCI_INTR_WDH, &regs->intrdisable);
1524 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1525 writel (OHCI_INTR_WDH, &regs->intrenable);
1526 }
1527
1528 if (ints & OHCI_INTR_SO) {
1529 dbg("USB Schedule overrun\n");
1530 writel (OHCI_INTR_SO, &regs->intrenable);
1531 stat = -1;
1532 }
1533
1534 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1535 if (ints & OHCI_INTR_SF) {
1536 unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
1537 wait_ms(1);
1538 writel (OHCI_INTR_SF, &regs->intrdisable);
1539 if (ohci->ed_rm_list[frame] != NULL)
1540 writel (OHCI_INTR_SF, &regs->intrenable);
1541 stat = 0xff;
1542 }
1543
1544 writel (ints, &regs->intrstatus);
1545 return stat;
1546 }
1547
1548 /*-------------------------------------------------------------------------*/
1549
1550 /*-------------------------------------------------------------------------*/
1551
1552 /* De-allocate all resources.. */
1553
1554 static void hc_release_ohci (ohci_t *ohci)
1555 {
1556 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1557
1558 if (!ohci->disabled)
1559 hc_reset (ohci);
1560 }
1561
1562 /*-------------------------------------------------------------------------*/
1563
1564 /*
1565 * low level initalisation routine, called from usb.c
1566 */
1567 static char ohci_inited = 0;
1568
1569 int usb_lowlevel_init(void)
1570 {
1571 memset (&gohci, 0, sizeof (ohci_t));
1572 memset (&urb_priv, 0, sizeof (urb_priv_t));
1573
1574 /* align the storage */
1575 if ((__u32)&ghcca[0] & 0xff) {
1576 err("HCCA not aligned!!");
1577 return -1;
1578 }
1579 phcca = &ghcca[0];
1580 info("aligned ghcca %p", phcca);
1581 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1582 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1583 err("EDs not aligned!!");
1584 return -1;
1585 }
1586 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1587 if ((__u32)gtd & 0x7) {
1588 err("TDs not aligned!!");
1589 return -1;
1590 }
1591 ptd = gtd;
1592 gohci.hcca = phcca;
1593 memset (phcca, 0, sizeof (struct ohci_hcca));
1594
1595 gohci.disabled = 1;
1596 gohci.sleeping = 0;
1597 gohci.irq = -1;
1598 #if defined(CONFIG_440EP)
1599 gohci.regs = (struct ohci_regs *)(CONFIG_SYS_PERIPHERAL_BASE | 0x1000);
1600 #elif defined(CONFIG_440EPX) || defined(CONFIG_SYS_USB_HOST)
1601 gohci.regs = (struct ohci_regs *)(CONFIG_SYS_USB_HOST);
1602 #endif
1603
1604 gohci.flags = 0;
1605 gohci.slot_name = "ppc440";
1606
1607 if (hc_reset (&gohci) < 0) {
1608 hc_release_ohci (&gohci);
1609 return -1;
1610 }
1611
1612 if (hc_start (&gohci) < 0) {
1613 err ("can't start usb-%s", gohci.slot_name);
1614 hc_release_ohci (&gohci);
1615 return -1;
1616 }
1617
1618 #ifdef DEBUG
1619 ohci_dump (&gohci, 1);
1620 #endif
1621 ohci_inited = 1;
1622 urb_finished = 1;
1623
1624 return 0;
1625 }
1626
1627 int usb_lowlevel_stop(void)
1628 {
1629 /* this gets called really early - before the controller has */
1630 /* even been initialized! */
1631 if (!ohci_inited)
1632 return 0;
1633 /* TODO release any interrupts, etc. */
1634 /* call hc_release_ohci() here ? */
1635 hc_reset (&gohci);
1636 return 0;
1637 }
1638
1639 #endif /* CONFIG_USB_OHCI */
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