arch/powerpc/include/asm/config.h

   1 /*
   2  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation; either version 2 of
   7  * the License, or (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17  * MA 02111-1307 USA
  18  *
  19  */
  20
  21 #ifndef _ASM_CONFIG_H_
  22 #define _ASM_CONFIG_H_
  23
  24 #ifdef CONFIG_MPC85xx
  25 #include <asm/config_mpc85xx.h>
  26 #endif
  27
  28 #ifdef CONFIG_MPC86xx
  29 #include <asm/config_mpc86xx.h>
  30 #endif
  31
  32 /* CONFIG_HARD_SPI triggers SPI bus initialization in PowerPC */
  33 #if defined(CONFIG_MPC8XXX_SPI) || defined(CONFIG_FSL_ESPI)
  34 # ifndef CONFIG_HARD_SPI
  35 #  define CONFIG_HARD_SPI
  36 # endif
  37 #endif
  38
  39 #define CONFIG_LMB
  40 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
  41 #define CONFIG_SYS_BOOT_GET_CMDLINE
  42 #define CONFIG_SYS_BOOT_GET_KBD
  43
  44 #ifndef CONFIG_MAX_MEM_MAPPED
  45 #if defined(CONFIG_4xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  46 #define CONFIG_MAX_MEM_MAPPED   ((phys_size_t)2 << 30)
  47 #else
  48 #define CONFIG_MAX_MEM_MAPPED   (256 << 20)
  49 #endif
  50 #endif
  51
  52 /* Check if boards need to enable FSL DMA engine for SDRAM init */
  53 #if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
  54 #if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
  55         ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
  56         !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
  57 #define CONFIG_FSL_DMA
  58 #endif
  59 #endif
  60
  61 #ifndef CONFIG_MAX_CPUS
  62 #define CONFIG_MAX_CPUS         1
  63 #endif
  64
  65 /*
  66  * Provide a default boot page translation virtual address that lines up with
  67  * Freescale's default e500 reset page.
  68  */
  69 #if (defined(CONFIG_E500) && defined(CONFIG_MP))
  70 #ifndef CONFIG_BPTR_VIRT_ADDR
  71 #define CONFIG_BPTR_VIRT_ADDR   0xfffff000
  72 #endif
  73 #endif
  74
  75 /*
  76  * SEC (crypto unit) major compatible version determination
  77  */
  78 #if defined(CONFIG_MPC83xx)
  79 #define CONFIG_SYS_FSL_SEC_COMPAT       2
  80 #endif
  81
  82 /* Since so many PPC SOCs have a semi-common LBC, define this here */
  83 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) || \
  84         defined(CONFIG_MPC83xx)
  85 #if !defined(CONFIG_FSL_IFC)
  86 #define CONFIG_FSL_LBC
  87 #endif
  88 #endif
  89
  90 /* The TSEC driver uses the PHYLIB infrastructure */
  91 #ifndef CONFIG_PHYLIB
  92 #if defined(CONFIG_TSEC_ENET)
  93 #define CONFIG_PHYLIB
  94
  95 #include <config_phylib_all_drivers.h>
  96 #endif /* TSEC_ENET */
  97 #endif /* !CONFIG_PHYLIB */
  98
  99 /* All PPC boards must swap IDE bytes */
 100 #define CONFIG_IDE_SWAP_IO
 101
 102 #endif /* _ASM_CONFIG_H_ */