arch/sparc/cpu/leon3/memcfg_low.S

   1 /* This is the memory initialization functions, the function
   2  * implemented below initializes each memory controller
   3  * found and specified by the input grlib_mctrl_handler structure.
   4  *
   5  * After the memory controllers have been initialized the stack
   6  * can be used.
   7  *
   8  * (C) Copyright 2010, 2015
   9  * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
  10  *
  11  * SPDX-License-Identifier:     GPL-2.0+
  12  */
  13
  14 #include <ambapp.h>
  15 #include "memcfg.h"
  16 #include <config.h>
  17
  18         .seg    "text"
  19         .globl  _nomem_memory_ctrl_init
  20         .globl  _nomem_mctrl_init, _nomem_ahbmctrl_init
  21         .extern _nomem_find_apb
  22         .extern _nomem_find_ahb
  23
  24
  25 /* FUNCTION
  26  *   _nomem_memory_controller_init(struct grlib_mctrl_handler *mem_handlers)
  27  *
  28  * Initialize AMBA devices, _nomem_amba_init() has prepared i0-i5
  29  * with the AHB buses on the system.
  30  *
  31  * For each entry in mem_handlers find the VENDOR:DEVICE and handle it
  32  * by calling the handler function pointer.
  33  *
  34  * Constraints:
  35  *  i6, i7, o6, l7, l6, g3, g4, g5, g6, g7 is used by caller
  36  *  o7 is return address
  37  *  l5 reserved for this function for future use.
  38  *
  39  * Arguments
  40  *  - o0 Pointer to memory handler array
  41  *
  42  * Results
  43  *  - o0 Number of memory controllers found
  44  *
  45  * Clobbered
  46  *  - o0 (Current AHB slave conf address)
  47  *  - l0 (mem handler entry address)
  48  *  - l1 (Return value, number of memory controllers found)
  49  *  - o7 (function pointer)
  50  *  - l0, l1, l2, l3, l4, g1, g2 (used by _nomem_ambapp_find_buses)
  51  *  - o0, o1, o2, o3, o4, o5 (Used as arguments)
  52  *
  53  *  - g1 ( level 1 return address)
  54  *  - g2 ( level 2 return address)
  55  */
  56
  57 _nomem_memory_ctrl_init:
  58         /* At this point all AHB buses has been found and the I/O Areas of
  59          * all AHB buses is stored in the i0-i5 registers. Max 6 buses. Next,
  60          * memory controllers are found by searching all buses for matching
  61          * VENDOR:DEVICE. The VENDOR:DEVICE to search for are taken from the
  62          * mem_handlers array. For each match the function pointer stored in
  63          * the mem_handler entry is called to handle the hardware setup.
  64          */
  65         mov     %o7, %g1        /* Save return address */
  66         mov     %o0, %l0
  67         mov     %g0, %l1        /* The return value */
  68
  69 .L_do_one_mem_handler:
  70         ld      [%l0 + MH_FUNC], %o7
  71         cmp     %o7, %g0
  72         be      .L_all_mctrl_handled
  73          nop
  74
  75         /*** Scan for memory controller ***/
  76
  77         /* Set up argments, o5 not used by _nomem_find_apb */
  78         ldub    [%l0 + MH_TYPE], %o5
  79         clr     %o4
  80         clr     %o3
  81         ldub    [%l0 + MH_INDEX], %o2
  82         ld      [%l0 + MH_VENDOR_DEVICE], %o1
  83
  84         /* An empty config? */
  85         cmp     %o5, DEV_NONE
  86         beq     .L_all_mctrl_next
  87
  88         /* Select function (APB or AHB) */
  89          cmp    %o5, DEV_APB_SLV
  90         bne     .L_find_ahb_memctrl
  91          clr    %o0
  92 .L_find_apb_memctrl:
  93         call    _nomem_find_apb                 /* Scan for APB slave device */
  94          nop
  95
  96         /* o3 = iobar address
  97          * o4 = AHB Bus index
  98          *
  99          * REG ADR = ((iobar >> 12) & (iobar << 4) & 0xfff00) | "APB Base"
 100          */
 101         ld      [%o3 + AMBA_APB_IOBAR_OFS], %o5
 102         srl     %o5, 12, %o2
 103         sll     %o5, 4, %o5
 104         and     %o2, %o5, %o5
 105         set     0xfff00, %o2
 106         and     %o2, %o5, %o5
 107         sethi   %hi(0xfff00000), %o2
 108         and     %o3, %o2, %o2
 109         or      %o5, %o2, %o5   /* Register base address */
 110
 111         ba      .L_call_one_mem_handler
 112          nop
 113
 114 .L_find_ahb_memctrl:
 115         call    _nomem_find_ahb         /* Scan for AHB Slave or Master.
 116                                          * o5 determine type. */
 117          nop
 118         clr     %o5
 119
 120         /* Call the handler function if the hardware was found
 121          *
 122          * o0 = mem_handler
 123          * o1 = Configuration address
 124          * o2 = AHB Bus index
 125          * o3 = APB Base register (if APB Slave)
 126          *
 127          * Constraints:
 128          * i0-i7, l0, l1, l5, g1, g3-g7 may no be used.
 129          */
 130 .L_call_one_mem_handler:
 131         cmp     %o0, %g0
 132         be      .L_all_mctrl_next
 133          mov    %l0, %o0                        /* Mem handler pointer */
 134         mov     %o3, %o1                        /* AMBA PnP Configuration address */
 135         mov     %o4, %o2                        /* AHB Bus index */
 136         ld      [%l0 + MH_FUNC], %o7    /* Get Function pointer */
 137         call    %o7
 138          mov    %o5, %o3                        /* APB Register Base Address */
 139
 140         inc     %l1                             /* Number of Memory controllers
 141                                                  * handled. */
 142
 143         /* Do next entry in mem_handlers */
 144 .L_all_mctrl_next:
 145         ba      .L_do_one_mem_handler
 146          add    %l0, MH_STRUCT_SIZE, %l0
 147
 148 .L_all_mctrl_handled:
 149         mov     %g1, %o7        /* Restore return address */
 150         retl
 151          mov    %l1, %o0
 152
 153
 154
 155 /* Generic Memory controller initialization routine (APB Registers)
 156  *
 157  * o0 = mem_handler structure pointer
 158  * o1 = Configuration address
 159  * o2 = AHB Bus index
 160  * o3 = APB Base register
 161  *
 162  * Clobbered
 163  *  o0-o4
 164  */
 165 _nomem_mctrl_init:
 166         ld      [%o0 + MH_PRIV], %o0    /* Get Private structure */
 167         ld      [%o0], %o1              /* Get Reg Mask */
 168         and     %o1, 0xff, %o1
 169         add     %o0, REGS_OFS, %o0      /* Point to first reg */
 170 .L_do_one_reg:
 171         andcc   %o1, 0x1, %g0
 172         beq     .L_do_next_reg
 173          ld     [%o0], %o2
 174         ld      [%o3], %o4
 175         and     %o4, %o2, %o4
 176         ld      [%o0 + 4], %o2
 177         or      %o4, %o2, %o4
 178         st      %o4, [%o3]
 179
 180 .L_do_next_reg:
 181         add     %o0, REGS_SIZE, %o0
 182         add     %o3, 4, %o3
 183         srl     %o1, 1, %o1
 184         cmp     %o1, 0
 185         bne     .L_do_one_reg
 186          nop
 187
 188         /* No more registers to write */
 189         retl
 190          nop
 191
 192
 193
 194 /* Generic Memory controller initialization routine (AHB Registers)
 195  *
 196  * o0 = mem_handler structure pointer
 197  * o1 = Configuration address of memory controller
 198  * o2 = AHB Bus index
 199  *
 200  * Clobbered
 201  *  o0-o5
 202  */
 203 _nomem_ahbmctrl_init:
 204         ld      [%o0 + MH_PRIV], %o0            /* Get Private structure */
 205
 206         /* Get index of AHB MBAR to get registers from */
 207         ld      [%o0], %o5
 208         add     %o0, 4, %o0
 209
 210         /* Get Address of MBAR in PnP info */
 211         add     %o5, 4, %o5
 212         sll     %o5, 2, %o5
 213         add     %o5, %o1, %o5                   /* Address of MBAR */
 214
 215         /* Get Address of registers from PnP information
 216          * Address is in AHB I/O format, i.e. relative to bus
 217          *
 218          * ADR = (iobar & (iobar << 16) & 0xfff00000)
 219          * IOADR = (ADR >> 12) | "APB Base"
 220          */
 221         ld      [%o5], %o5
 222         sll     %o5, 16, %o4
 223         and     %o5, %o4, %o5
 224         sethi   %hi(0xfff00000), %o4
 225         and     %o5, %o4, %o5                   /* ADR */
 226         and     %o4, %o1, %o4
 227         srl     %o5, 12, %o5
 228         or      %o5, %o4, %o3                   /* IOADR in o3 */
 229
 230         ld      [%o0], %o1                      /* Get Reg Mask */
 231         and     %o1, 0xff, %o1
 232         add     %o0, REGS_OFS, %o0              /* Point to first reg */
 233 .L_do_one_ahbreg:
 234         andcc   %o1, 0x1, %g0
 235         beq     .L_do_next_reg
 236          ld     [%o0], %o2
 237         ld      [%o3], %o4
 238         and     %o4, %o2, %o4
 239         ld      [%o0 + 4], %o2
 240         or      %o4, %o2, %o4
 241         st      %o4, [%o3]
 242
 243 .L_do_next_ahbreg:
 244         add     %o0, REGS_SIZE, %o0
 245         add     %o3, 4, %o3
 246         srl     %o1, 1, %o1
 247         cmp     %o1, 0
 248         bne     .L_do_one_reg
 249          nop
 250
 251         /* No more registers to write */
 252         retl
 253          nop