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mtd/spi: fix block count for is25lq040b
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1 #
2 # From Coreboot src/northbridge/intel/sandybridge/Kconfig
3 #
4 # Copyright (C) 2010 Google Inc.
5 #
6 # SPDX-License-Identifier: GPL-2.0
7
8 config NORTHBRIDGE_INTEL_IVYBRIDGE
9 bool
10 select CACHE_MRC_BIN if HAVE_MRC
11 imply HAVE_INTEL_ME
12 imply ENABLE_MRC_CACHE
13 imply AHCI_PCI
14 imply ICH_SPI
15 imply INTEL_ICH6_GPIO
16 imply SCSI
17 imply SPI_FLASH
18 imply USB
19 imply USB_EHCI_HCD
20 imply VIDEO_VESA
21
22 if NORTHBRIDGE_INTEL_IVYBRIDGE
23
24 config DCACHE_RAM_BASE
25 default 0xff7e0000
26
27 config DCACHE_RAM_SIZE
28 default 0x20000
29
30 config DCACHE_RAM_MRC_VAR_SIZE
31 default 0x4000
32
33 config CPU_SPECIFIC_OPTIONS
34 def_bool y
35 select SMM_TSEG
36 select X86_RAMTEST
37
38 config SMM_TSEG_SIZE
39 hex
40 default 0x800000
41
42 config ENABLE_VMX
43 bool "Enable VMX for virtualization"
44 default n
45 help
46 Virtual Machine Extensions are provided in many x86 CPUs. These
47 provide various facilities for allowing a host OS to provide an
48 environment where potentially several guest OSes have only
49 limited access to the underlying hardware. This is achieved
50 without resorting to software trapping and/or instruction set
51 emulation (which would be very slow).
52
53 Intel's implementation of this is called VT-x. This option enables
54 VT-x this so that the OS that is booted by U-Boot can make use of
55 these facilities. If this option is not enabled, then the host OS
56 will be unable to support virtualisation, or it will run very
57 slowly.
58
59 config FSP_ADDR
60 hex
61 default 0xfff80000
62
63 config FSP_USE_UPD
64 bool
65 default n
66
67 config FSP_BROKEN_HOB
68 bool
69 default y
70
71 endif