arch/x86/cpu/quark/Kconfig

   1 #
   2 # Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
   3 #
   4 # SPDX-License-Identifier:      GPL-2.0+
   5 #
   6
   7 config INTEL_QUARK
   8         bool
   9         select HAVE_RMU
  10         select ARCH_EARLY_INIT_R
  11         select ARCH_MISC_INIT
  12         imply ENABLE_MRC_CACHE
  13         imply ETH_DESIGNWARE
  14         imply ICH_SPI
  15         imply INTEL_ICH6_GPIO
  16         imply MMC
  17         imply MMC_PCI
  18         imply MMC_SDHCI
  19         imply MMC_SDHCI_SDMA
  20         imply SPI_FLASH
  21         imply SYS_NS16550
  22         imply USB
  23         imply USB_EHCI_HCD
  24
  25 if INTEL_QUARK
  26
  27 config HAVE_RMU
  28         bool "Add a Remote Management Unit (RMU) binary"
  29         help
  30           Select this option to add a Remote Management Unit (RMU) binary
  31           to the resulting U-Boot image. It is a data block (up to 64K) of
  32           machine-specific code which must be put in the flash for the RMU
  33           within the Quark SoC processor to access when powered up before
  34           system BIOS is executed.
  35
  36 config RMU_FILE
  37         string "Remote Management Unit (RMU) binary filename"
  38         depends on HAVE_RMU
  39         default "rmu.bin"
  40         help
  41           The filename of the file to use as Remote Management Unit (RMU)
  42           binary in the board directory.
  43
  44 config RMU_ADDR
  45         hex "Remote Management Unit (RMU) binary location"
  46         depends on HAVE_RMU
  47         default 0xfff00000
  48         help
  49           The location of the RMU binary is determined by a strap. It must be
  50           put in flash at a location matching the strap-determined base address.
  51
  52           The default base address of 0xfff00000 indicates that the binary must
  53           be located at offset 0 from the beginning of a 1MB flash device.
  54
  55 config HAVE_CMC
  56         bool
  57         default HAVE_RMU
  58
  59 config CMC_FILE
  60         string
  61         depends on HAVE_CMC
  62         default RMU_FILE
  63
  64 config CMC_ADDR
  65         hex
  66         depends on HAVE_CMC
  67         default RMU_ADDR
  68
  69 config ESRAM_BASE
  70         hex
  71         default 0x80000000
  72         help
  73           Embedded SRAM (eSRAM) memory-mapped base address.
  74
  75 config PCIE_ECAM_BASE
  76         hex
  77         default 0xe0000000
  78
  79 config RCBA_BASE
  80         hex
  81         default 0xfed1c000
  82         help
  83           Root Complex register block memory-mapped base address.
  84
  85 config ACPI_PM1_BASE
  86         hex
  87         default 0x1000
  88         help
  89           ACPI Power Managment 1 (PM1) i/o-mapped base address.
  90           This device is defined in ACPI specification, with 16 bytes in size.
  91
  92 config ACPI_PBLK_BASE
  93         hex
  94         default 0x1010
  95         help
  96           ACPI Processor Block (PBLK) i/o-mapped base address.
  97           This device is defined in ACPI specification, with 16 bytes in size.
  98
  99 config SPI_DMA_BASE
 100         hex
 101         default 0x1020
 102         help
 103           SPI DMA i/o-mapped base address.
 104
 105 config GPIO_BASE
 106         hex
 107         default 0x1080
 108         help
 109           GPIO i/o-mapped base address.
 110
 111 config ACPI_GPE0_BASE
 112         hex
 113         default 0x1100
 114         help
 115           ACPI General Purpose Event 0 (GPE0) i/o-mapped base address.
 116           This device is defined in ACPI specification, with 64 bytes in size.
 117
 118 config WDT_BASE
 119         hex
 120         default 0x1140
 121         help
 122           Watchdog timer i/o-mapped base address.
 123
 124 config SYS_CAR_ADDR
 125         hex
 126         default ESRAM_BASE
 127
 128 config SYS_CAR_SIZE
 129         hex
 130         default 0x8000
 131         help
 132           Space in bytes in eSRAM used as Cache-As-ARM (CAR).
 133           Note this size must not exceed eSRAM's total size.
 134
 135 endif