]> git.ipfire.org Git - people/ms/u-boot.git/blob - arch/x86/dts/qemu-x86_i440fx.dts
x86: qemu: Enable writing MP table
[people/ms/u-boot.git] / arch / x86 / dts / qemu-x86_i440fx.dts
1 /*
2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 /dts-v1/;
8
9 #include <dt-bindings/interrupt-router/intel-irq.h>
10
11 /include/ "skeleton.dtsi"
12 /include/ "serial.dtsi"
13 /include/ "rtc.dtsi"
14
15 / {
16 model = "QEMU x86 (I440FX)";
17 compatible = "qemu,x86";
18
19 config {
20 silent_console = <0>;
21 };
22
23 chosen {
24 stdout-path = "/serial";
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 cpu@0 {
32 device_type = "cpu";
33 compatible = "cpu-x86";
34 reg = <0>;
35 intel,apic-id = <0>;
36 };
37 };
38
39 pci {
40 compatible = "pci-x86";
41 #address-cells = <3>;
42 #size-cells = <2>;
43 u-boot,dm-pre-reloc;
44 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
45 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
46 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
47
48 irq-router@1,0 {
49 reg = <0x00000800 0 0 0 0>;
50 compatible = "intel,irq-router";
51 intel,pirq-config = "pci";
52 intel,pirq-link = <0x60 4>;
53 intel,pirq-mask = <0x0e40>;
54 intel,pirq-routing = <
55 /* PIIX UHCI */
56 PCI_BDF(0, 1, 2) INTD PIRQD
57 /* e1000 NIC */
58 PCI_BDF(0, 3, 0) INTA PIRQC
59 >;
60 };
61 };
62
63 };