arch/x86/lib/pcat_timer.c

   1 /*
   2  * (C) Copyright 2002
   3  * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <asm/io.h>
  26 #include <asm/i8254.h>
  27 #include <asm/ibmpc.h>
  28 #include <asm/interrupt.h>
  29
  30 #define TIMER0_VALUE 0x04aa /* 1kHz 1.9318MHz / 1000 */
  31 #define TIMER2_VALUE 0x0a8e /* 440Hz */
  32
  33 static int timer_init_done;
  34
  35 int timer_init(void)
  36 {
  37         /* initialize timer 0 and 2
  38          *
  39          * Timer 0 is used to increment system_tick 1000 times/sec
  40          * Timer 1 was used for DRAM refresh in early PC's
  41          * Timer 2 is used to drive the speaker
  42          * (to start a beep: write 3 to port 0x61,
  43          * to stop it again: write 0)
  44          */
  45         outb(PIT_CMD_CTR0 | PIT_CMD_BOTH | PIT_CMD_MODE2,
  46                         PIT_BASE + PIT_COMMAND);
  47         outb(TIMER0_VALUE & 0xff, PIT_BASE + PIT_T0);
  48         outb(TIMER0_VALUE >> 8, PIT_BASE + PIT_T0);
  49
  50         outb(PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3,
  51                         PIT_BASE + PIT_COMMAND);
  52         outb(TIMER2_VALUE & 0xff, PIT_BASE + PIT_T2);
  53         outb(TIMER2_VALUE >> 8, PIT_BASE + PIT_T2);
  54
  55         irq_install_handler(0, timer_isr, NULL);
  56         unmask_irq(0);
  57
  58         timer_init_done = 1;
  59
  60         return 0;
  61 }
  62
  63 static u16 read_pit(void)
  64 {
  65         u8 low;
  66
  67         outb(PIT_CMD_LATCH, PIT_BASE + PIT_COMMAND);
  68         low = inb(PIT_BASE + PIT_T0);
  69
  70         return (inb(PIT_BASE + PIT_T0) << 8) | low;
  71 }
  72
  73 /* this is not very exact */
  74 void __udelay(unsigned long usec)
  75 {
  76         int counter;
  77         int wraps;
  78
  79         if (timer_init_done) {
  80                 counter = read_pit();
  81                 wraps = usec / 1000;
  82                 usec = usec % 1000;
  83
  84                 usec *= 1194;
  85                 usec /= 1000;
  86                 usec += counter;
  87
  88                 while (usec > 1194) {
  89                         usec -= 1194;
  90                         wraps++;
  91                 }
  92
  93                 while (1) {
  94                         int new_count = read_pit();
  95
  96                         if (((new_count < usec) && !wraps) || wraps < 0)
  97                                 break;
  98
  99                         if (new_count > counter)
 100                                 wraps--;
 101
 102                         counter = new_count;
 103                 }
 104         }
 105
 106 }