arch/x86/lib/pci.c

   1 /*
   2  * (C) Copyright 2002
   3  * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <pci.h>
  26 #include <asm/io.h>
  27 #include <asm/pci.h>
  28
  29 #undef PCI_ROM_SCAN_VERBOSE
  30
  31 int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
  32 {
  33         struct pci_controller *hose;
  34         int res = -1;
  35         int i;
  36
  37         u32 rom_addr;
  38         u32 addr_reg;
  39         u32 size;
  40
  41         u16 vendor;
  42         u16 device;
  43         u32 class_code;
  44
  45         hose = pci_bus_to_hose(PCI_BUS(dev));
  46 #if 0
  47         printf("pci_shadow_rom() asked to shadow device %x to %x\n",
  48                dev, (u32)dest);
  49 #endif
  50         pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
  51         pci_read_config_word(dev, PCI_DEVICE_ID, &device);
  52         pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code);
  53
  54         class_code &= 0xffffff00;
  55         class_code >>= 8;
  56
  57         debug("PCI Header Vendor %04x device %04x class %06x\n",
  58                vendor, device, class_code);
  59
  60         /* Enable the rom addess decoder */
  61         pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK);
  62         pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg);
  63
  64         if (!addr_reg) {
  65                 /* register unimplemented */
  66                 printf("pci_chadow_rom: device do not seem to have a rom\n");
  67                 return -1;
  68         }
  69
  70         size = (~(addr_reg&PCI_ROM_ADDRESS_MASK))+1;
  71
  72         debug("ROM is %d bytes\n", size);
  73
  74         rom_addr = pci_get_rom_window(hose, size);
  75
  76         debug("ROM mapped at %x\n", rom_addr);
  77
  78         pci_write_config_dword(dev, PCI_ROM_ADDRESS,
  79                                pci_phys_to_mem(dev, rom_addr)
  80                                |PCI_ROM_ADDRESS_ENABLE);
  81
  82
  83         for (i=rom_addr;i<rom_addr+size; i+=512) {
  84
  85
  86                 if (readw(i) == 0xaa55) {
  87                         u32 pci_data;
  88 #ifdef PCI_ROM_SCAN_VERBOSE
  89                         printf("ROM signature found\n");
  90 #endif
  91                         pci_data = readw(0x18+i);
  92                         pci_data += i;
  93
  94                         if (0==memcmp((void*)pci_data, "PCIR", 4)) {
  95 #ifdef PCI_ROM_SCAN_VERBOSE
  96                                 printf("Fount PCI rom image at offset %d\n", i-rom_addr);
  97                                 printf("Vendor %04x device %04x class %06x\n",
  98                                        readw(pci_data+4), readw(pci_data+6),
  99                                        readl(pci_data+0x0d)&0xffffff);
 100                                 printf("%s\n",
 101                                        (readw(pci_data+0x15) &0x80)?
 102                                        "Last image":"More images follow");
 103                                 switch  (readb(pci_data+0x14)) {
 104                                 case 0:
 105                                         printf("X86 code\n");
 106                                         break;
 107                                 case 1:
 108                                         printf("Openfirmware code\n");
 109                                         break;
 110                                 case 2:
 111                                         printf("PARISC code\n");
 112                                         break;
 113                                 }
 114                                 printf("Image size %d\n", readw(pci_data+0x10) * 512);
 115 #endif
 116                                 /* FixMe: I think we should compare the class code
 117                                  * bytes as well but I have no reference on the
 118                                  * exact order of these bytes in the PCI ROM header */
 119                                 if (readw(pci_data+4) == vendor &&
 120                                     readw(pci_data+6) == device &&
 121                                     /* (readl(pci_data+0x0d)&0xffffff) == class_code && */
 122                                     readb(pci_data+0x14) == 0 /* x86 code image */ ) {
 123 #ifdef PCI_ROM_SCAN_VERBOSE
 124                                         printf("Suitable ROM image found, copying\n");
 125 #endif
 126                                         memmove(dest, (void*)rom_addr, readw(pci_data+0x10) * 512);
 127                                         res = 0;
 128                                         break;
 129
 130                                 }
 131                                 if (readw(pci_data+0x15) &0x80) {
 132                                         break;
 133                                 }
 134                         }
 135                 }
 136
 137         }
 138
 139 #ifdef PCI_ROM_SCAN_VERBOSE
 140         if (res) {
 141                 printf("No suitable image found\n");
 142         }
 143 #endif
 144         /* disable PAR register and PCI device ROM address devocer */
 145         pci_remove_rom_window(hose, rom_addr);
 146
 147         pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
 148
 149         return res;
 150 }