board/amcc/acadia/memory.c

   1 /*
   2  * (C) Copyright 2007
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /* define DEBUG for debugging output (obviously ;-)) */
  25 #if 0
  26 #define DEBUG
  27 #endif
  28
  29 #include <common.h>
  30 #include <asm/processor.h>
  31 #include <asm/io.h>
  32 #include <asm/gpio.h>
  33
  34 extern void board_pll_init_f(void);
  35
  36 /*
  37  * sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
  38  */
  39 void sdram_init(void)
  40 {
  41         return;
  42 }
  43
  44 #if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
  45 static void cram_bcr_write(u32 wr_val)
  46 {
  47         wr_val <<= 2;
  48
  49         /* set CRAM_CRE to 1 */
  50         gpio_write_bit(CFG_GPIO_CRAM_CRE, 1);
  51
  52         /* Write BCR to CRAM on CS1 */
  53         out32(wr_val + 0x00200000, 0);
  54         debug("CRAM VAL: %08x for CS1 ", wr_val + 0x00200000);
  55
  56         /* Write BCR to CRAM on CS2 */
  57         out32(wr_val + 0x02200000, 0);
  58         debug("CRAM VAL: %08x for CS2\n", wr_val + 0x02200000);
  59
  60         sync();
  61         eieio();
  62
  63         /* set CRAM_CRE back to 0 (normal operation) */
  64         gpio_write_bit(CFG_GPIO_CRAM_CRE, 0);
  65
  66         return;
  67 }
  68 #endif
  69
  70 long int initdram(int board_type)
  71 {
  72 #if defined(CONFIG_NAND_SPL)
  73         u32 reg;
  74
  75         /* don't reinit PLL when booting via I2C bootstrap option */
  76         mfsdr(SDR_PINSTP, reg);
  77         if (reg != 0xf0000000)
  78                 board_pll_init_f();
  79 #endif
  80
  81 #if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
  82         int i;
  83         u32 val;
  84
  85         /* 1. EBC need to program READY, CLK, ADV for ASync mode */
  86         gpio_config(CFG_GPIO_CRAM_CLK, GPIO_OUT, GPIO_SEL, GPIO_OUT_0);
  87         gpio_config(CFG_GPIO_CRAM_ADV, GPIO_OUT, GPIO_SEL, GPIO_OUT_0);
  88         gpio_config(CFG_GPIO_CRAM_CRE, GPIO_OUT, GPIO_SEL, GPIO_OUT_0);
  89         gpio_config(CFG_GPIO_CRAM_WAIT, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG);
  90
  91         /* 2. EBC in Async mode */
  92         mtebc(pb1ap, 0x078F1EC0);
  93         mtebc(pb2ap, 0x078F1EC0);
  94         mtebc(pb1cr, 0x000BC000);
  95         mtebc(pb2cr, 0x020BC000);
  96
  97         /* 3. Set CRAM in Sync mode */
  98         cram_bcr_write(0x7012);         /* CRAM burst setting */
  99
 100         /* 4. EBC in Sync mode */
 101         mtebc(pb1ap, 0x9C0201C0);
 102         mtebc(pb2ap, 0x9C0201C0);
 103
 104         /* Set GPIO pins back to alternate function */
 105         gpio_config(CFG_GPIO_CRAM_CLK, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG);
 106         gpio_config(CFG_GPIO_CRAM_ADV, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG);
 107
 108         /* Config EBC to use RDY */
 109         mfsdr(sdrultra0, val);
 110         mtsdr(sdrultra0, val | SDR_ULTRA0_EBCRDYEN);
 111
 112         /* Wait a short while, since for NAND booting this is too fast */
 113         for (i=0; i<200000; i++)
 114                 ;
 115 #endif
 116
 117         return (CFG_MBYTES_RAM << 20);
 118 }
 119
 120 int testdram(void)
 121 {
 122         return (0);
 123 }